A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-13 08:07:32 -04:00
Code Issues Projects Releases Packages Wiki Activity

qcacld-3.0: Add hdd tx-rx apis for High Latency systems (Part 5 - HL Datapath)

Browse source 
Support per vdev tx desc pool in hdd and
for sending 802.11z action frames.
CRs-Fixed: 975526
Change-Id: Ic63e07abdabae9795bba6f76daa954235c894245
This commit is contained in:
Poddar, Siddarth 2016-04-28 16:02:39 +05:30 • committed by Vishwajith Upendra
commit b61cf643e2
6 changed files with 365 additions and 38 deletions
Download patch file Download diff file Expand all files Collapse all files

39
core/bmi/src/ol_fw.c
View file

@ -1565,6 +1565,39 @@ void ol_dump_target_memory(struct hif_opaque_softc *scn, void *memory_block)
}
}
#ifdef CONFIG_HL_SUPPORT
/**
* ol_dump_ce_register() - cannot read the section
* @scn: ol_softc handler
* @memory_block: non-NULL reserved memory location
*
* Return: -EACCES for LL and not apllicable for HL
*/
static inline int
ol_dump_ce_register(struct hif_opaque_softc *scn, void *memory_block)
{
return 0;
}
#else
static int
ol_dump_ce_register(struct hif_opaque_softc *scn, void *memory_block)
{
int ret;
BMI_ERR("Could not read dump section!");
if (hif_dump_registers(scn))
BMI_ERR("Failed to dump bus registers");
ol_dump_target_memory(scn, memory_block);
ret = -EACCES;
return ret;
}
#endif
/**
* ol_target_coredump() - API to collect target ramdump
* @inst - private context
@ -1639,11 +1672,7 @@ static int ol_target_coredump(void *inst, void *memory_block,
buffer_loc += result;
section_count++;
} else {
BMI_ERR("Could not read dump section!");
if (hif_dump_registers(scn))
BMI_ERR("Failed to dump bus registers");
ol_dump_target_memory(scn, memory_block);
ret = -EACCES;
ret = ol_dump_ce_register(scn, memory_block);
break; /* Could not read the section */
}
} else {

159
core/hdd/inc/wlan_hdd_cfg.h
View file

@ -1481,6 +1481,138 @@ typedef enum {
#define CFG_ALLOW_MCC_GO_DIFF_BI_MAX (4)
#define CFG_ALLOW_MCC_GO_DIFF_BI_DEFAULT (4)
#if defined(CONFIG_HL_SUPPORT) && defined(QCA_BAD_PEER_TX_FLOW_CL)
/*
* Enable/Disable Bad Peer TX CTL feature
* Default: Enable
*/
#define CFG_BAD_PEER_TX_CTL_ENABLE_NAME "gBadPeerTxCtlEnable"
#define CFG_BAD_PEER_TX_CTL_ENABLE_MIN (0)
#define CFG_BAD_PEER_TX_CTL_ENABLE_MAX (1)
#define CFG_BAD_PEER_TX_CTL_ENABLE_DEFAULT (1)
#define CFG_BAD_PEER_TX_CTL_PERIOD_NAME "gBadPeerTxCtlPeriod"
#define CFG_BAD_PEER_TX_CTL_PERIOD_MIN (10)
#define CFG_BAD_PEER_TX_CTL_PERIOD_MAX (10000)
#define CFG_BAD_PEER_TX_CTL_PERIOD_DEFAULT (50)
#define CFG_BAD_PEER_TX_CTL_TXQ_LIMIT_NAME "gBadPeerTxCtlTxqLimit"
#define CFG_BAD_PEER_TX_CTL_TXQ_LIMIT_MIN (1)
#define CFG_BAD_PEER_TX_CTL_TXQ_LIMIT_MAX (5000)
#define CFG_BAD_PEER_TX_CTL_TXQ_LIMIT_DEFAULT (100)
#define CFG_BAD_PEER_TX_CTL_TGT_BACKOFF_T_NAME "gBadPeerTxCtlTgtBackoffTime"
#define CFG_BAD_PEER_TX_CTL_TGT_BACKOFF_T_MIN (1)
#define CFG_BAD_PEER_TX_CTL_TGT_BACKOFF_T_MAX (5000)
#define CFG_BAD_PEER_TX_CTL_TGT_BACKOFF_T_DEFAULT (20)
#define CFG_BAD_PEER_TX_CTL_TGT_REPORT_PRD_NAME "gBadPeerTxCtlTgtReportPeriod"
#define CFG_BAD_PEER_TX_CTL_TGT_REPORT_PRD_MIN (1)
#define CFG_BAD_PEER_TX_CTL_TGT_REPORT_PRD_MAX (5000)
#define CFG_BAD_PEER_TX_CTL_TGT_REPORT_PRD_DEFAULT (500)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEB_NAME "gBadPeerTxCtlCondLevelIeeeB"
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEB_MIN (1)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEB_MAX (2)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEB_DEFAULT (2)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEB_NAME "gBadPeerTxCtlDeltaLevelIeeeB"
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEB_MIN (1)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEB_MAX (11)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEB_DEFAULT (2)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEB_NAME "gBadPeerTxCtlPctLevelIeeeB"
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEB_MIN (1)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEB_MAX (8)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEB_DEFAULT (1)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEB_NAME "gBadPeerTxCtlTputLevelIeeeB"
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEB_MIN (1)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEB_MAX (11)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEB_DEFAULT (2)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEB_NAME "gBadPeerTxCtlTxLimitLevelIeeeB"
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEB_MIN (0)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEB_MAX (50)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEB_DEFAULT (3)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAG_NAME "gBadPeerTxCtlCondLevelIeeeAG"
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAG_MIN (1)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAG_MAX (2)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAG_DEFAULT (2)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAG_NAME "gBadPeerTxCtlDeltaLevelIeeeAG"
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAG_MIN (6)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAG_MAX (54)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAG_DEFAULT (6)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAG_NAME "gBadPeerTxCtlPctLevelIeeeAG"
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAG_MIN (1)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAG_MAX (8)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAG_DEFAULT (1)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAG_NAME "gBadPeerTxCtlTputLevelIeeeAG"
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAG_MIN (6)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAG_MAX (54)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAG_DEFAULT (6)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAG_NAME "gBadPeerTxCtlTxLimitLevelIeeeAG"
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAG_MIN (0)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAG_MAX (50)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAG_DEFAULT (3)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEN_NAME "gBadPeerTxCtlCondLevelIeeeN"
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEN_MIN (1)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEN_MAX (2)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEN_DEFAULT (2)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEN_NAME "gBadPeerTxCtlDeltaLevelIeeeN"
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEN_MIN (6)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEN_MAX (72)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEN_DEFAULT (6)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEN_NAME "gBadPeerTxCtlPctLevelIeeeN"
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEN_MIN (1)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEN_MAX (8)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEN_DEFAULT (1)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEN_NAME "gBadPeerTxCtlTputLevelIeeeN"
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEN_MIN (6)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEN_MAX (72)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEN_DEFAULT (15)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEN_NAME "gBadPeerTxCtlTxLimitLevelIeeeN"
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEN_MIN (0)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEN_MAX (50)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEN_DEFAULT (3)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAC_NAME "gBadPeerTxCtlCondLevelIeeeAC"
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAC_MIN (1)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAC_MAX (2)
#define CFG_BAD_PEER_TX_CTL_COND_LEVEL_IEEEAC_DEFAULT (2)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAC_NAME "gBadPeerTxCtlDeltaLevelIeeeAC"
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAC_MIN (6)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAC_MAX (433)
#define CFG_BAD_PEER_TX_CTL_DELTA_LEVEL_IEEEAC_DEFAULT (6)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAC_NAME "gBadPeerTxCtlPctLevelIeeeAC"
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAC_MIN (1)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAC_MAX (8)
#define CFG_BAD_PEER_TX_CTL_PCT_LEVEL_IEEEAC_DEFAULT (1)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAC_NAME "gBadPeerTxCtlTputLevelIeeeAC"
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAC_MIN (6)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAC_MAX (433)
#define CFG_BAD_PEER_TX_CTL_TPUT_LEVEL_IEEEAC_DEFAULT (15)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAC_NAME "gBadPeerTxCtlTxLimitLevelIeeeAC"
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAC_MIN (0)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAC_MAX (50)
#define CFG_BAD_PEER_TX_CTL_TX_LIMIT_LEVEL_IEEEAC_DEFAULT (3)
#endif
/*
* Enable/Disable Thermal Mitigation feature
* Default: Enable
@ -3512,6 +3644,33 @@ struct hdd_config {
uint32_t throttle_dutycycle_level1;
uint32_t throttle_dutycycle_level2;
uint32_t throttle_dutycycle_level3;
#if defined(CONFIG_HL_SUPPORT) && defined(QCA_BAD_PEER_TX_FLOW_CL)
bool bad_peer_txctl_enable;
uint32_t bad_peer_txctl_prd;
uint32_t bad_peer_txctl_txq_lmt;
uint32_t bad_peer_tgt_backoff;
uint32_t bad_peer_tgt_report_prd;
uint32_t bad_peer_cond_ieee80211b;
uint32_t bad_peer_delta_ieee80211b;
uint32_t bad_peer_pct_ieee80211b;
uint32_t bad_peer_tput_ieee80211b;
uint32_t bad_peer_limit_ieee80211b;
uint32_t bad_peer_cond_ieee80211ag;
uint32_t bad_peer_delta_ieee80211ag;
uint32_t bad_peer_pct_ieee80211ag;
uint32_t bad_peer_tput_ieee80211ag;
uint32_t bad_peer_limit_ieee80211ag;
uint32_t bad_peer_cond_ieee80211n;
uint32_t bad_peer_delta_ieee80211n;
uint32_t bad_peer_pct_ieee80211n;
uint32_t bad_peer_tput_ieee80211n;
uint32_t bad_peer_limit_ieee80211n;
uint32_t bad_peer_cond_ieee80211ac;
uint32_t bad_peer_delta_ieee80211ac;
uint32_t bad_peer_pct_ieee80211ac;
uint32_t bad_peer_tput_ieee80211ac;
uint32_t bad_peer_limit_ieee80211ac;
#endif
uint8_t vhtChannelWidth;
uint8_t vhtRxMCS;
uint8_t vhtTxMCS;

45
core/hdd/src/wlan_hdd_softap_tx_rx.c
View file

@ -117,6 +117,49 @@ void hdd_softap_tx_resume_timer_expired_handler(void *adapter_context)
return;
}
#if defined(CONFIG_PER_VDEV_TX_DESC_POOL)
/**
* hdd_softap_tx_resume_false() - Resume OS TX Q false leads to queue disabling
* @pAdapter: pointer to hdd adapter
* @tx_resume: TX Q resume trigger
*
*
* Return: None
*/
static void
hdd_softap_tx_resume_false(hdd_adapter_t *pAdapter, bool tx_resume)
{
if (true == tx_resume)
return;
hdd_notice("Disabling queues");
wlan_hdd_netif_queue_control(pAdapter, WLAN_STOP_ALL_NETIF_QUEUE,
WLAN_DATA_FLOW_CONTROL);
if (QDF_TIMER_STATE_STOPPED ==
qdf_mc_timer_get_current_state(&pAdapter->
tx_flow_control_timer)) {
QDF_STATUS status;
status = qdf_mc_timer_start(&pAdapter->tx_flow_control_timer,
WLAN_SAP_HDD_TX_FLOW_CONTROL_OS_Q_BLOCK_TIME);
if (!QDF_IS_STATUS_SUCCESS(status))
hdd_err("Failed to start tx_flow_control_timer");
else
pAdapter->hdd_stats.hddTxRxStats.txflow_timer_cnt++;
}
return;
}
#else
static inline void
hdd_softap_tx_resume_false(hdd_adapter_t *pAdapter, bool tx_resume)
{
return;
}
#endif
/**
* hdd_softap_tx_resume_cb() - Resume OS TX Q.
* @adapter_context: pointer to vdev apdapter
@ -150,6 +193,8 @@ void hdd_softap_tx_resume_cb(void *adapter_context, bool tx_resume)
WLAN_WAKE_ALL_NETIF_QUEUE,
WLAN_DATA_FLOW_CONTROL);
}
hdd_softap_tx_resume_false(pAdapter, tx_resume);
return;
}
#endif /* QCA_LL_LEGACY_TX_FLOW_CONTROL */

49
core/hdd/src/wlan_hdd_tx_rx.c
View file

@ -96,6 +96,53 @@ void hdd_tx_resume_timer_expired_handler(void *adapter_context)
WLAN_CONTROL_PATH);
return;
}
#if defined(CONFIG_PER_VDEV_TX_DESC_POOL)
/**
* hdd_tx_resume_false() - Resume OS TX Q false leads to queue disabling
* @pAdapter: pointer to hdd adapter
* @tx_resume: TX Q resume trigger
*
*
* Return: None
*/
static void
hdd_tx_resume_false(hdd_adapter_t *pAdapter, bool tx_resume)
{
if (true == tx_resume)
return;
/* Pause TX */
hdd_notice("Disabling queues");
wlan_hdd_netif_queue_control(pAdapter, WLAN_STOP_ALL_NETIF_QUEUE,
WLAN_DATA_FLOW_CONTROL);
if (QDF_TIMER_STATE_STOPPED ==
qdf_mc_timer_get_current_state(&pAdapter->
tx_flow_control_timer)) {
QDF_STATUS status;
status = qdf_mc_timer_start(&pAdapter->tx_flow_control_timer,
WLAN_HDD_TX_FLOW_CONTROL_OS_Q_BLOCK_TIME);
if (!QDF_IS_STATUS_SUCCESS(status))
hdd_err("Failed to start tx_flow_control_timer");
else
pAdapter->hdd_stats.hddTxRxStats.txflow_timer_cnt++;
}
pAdapter->hdd_stats.hddTxRxStats.txflow_pause_cnt++;
pAdapter->hdd_stats.hddTxRxStats.is_txflow_paused = true;
return;
}
#else
static inline void
hdd_tx_resume_false(hdd_adapter_t *pAdapter, bool tx_resume)
{
return;
}
#endif
/**
* hdd_tx_resume_cb() - Resume OS TX Q.
@ -135,6 +182,8 @@ void hdd_tx_resume_cb(void *adapter_context, bool tx_resume)
WLAN_WAKE_ALL_NETIF_QUEUE,
WLAN_DATA_FLOW_CONTROL);
}
hdd_tx_resume_false(pAdapter, tx_resume);
return;
}

1
core/mac/src/include/sir_params.h
View file

@ -592,6 +592,7 @@ typedef struct sSirMbMsgP2p {
#define SIR_HAL_PDEV_SET_HW_MODE_RESP (SIR_HAL_ITC_MSG_TYPES_BEGIN + 330)
#define SIR_HAL_PDEV_HW_MODE_TRANS_IND (SIR_HAL_ITC_MSG_TYPES_BEGIN + 331)
#define SIR_HAL_BAD_PEER_TX_CTL_INI_CMD (SIR_HAL_ITC_MSG_TYPES_BEGIN + 332)
#define SIR_HAL_SET_RSSI_MONITOR_REQ (SIR_HAL_ITC_MSG_TYPES_BEGIN + 333)
#define SIR_HAL_SET_IE_INFO (SIR_HAL_ITC_MSG_TYPES_BEGIN + 334)

110
core/mac/src/pe/lim/lim_process_tdls.c
View file

@ -846,10 +846,64 @@ static void populate_dotf_tdls_vht_aid(tpAniSirGlobal pMac, uint32_t selfDot11Mo
}
}
#ifdef CONFIG_HL_SUPPORT
/**
* wma_tx_frame_with_tx_complete_send() - Send tx frames on Direct link or AP link
* depend on reason code
* @pMac: pointer to MAC Sirius parameter structure
* @pPacket: pointer to mgmt packet
* @nBytes: number of bytes to send
* @tid:tid value for AC
* @pFrame: pointer to tdls frame
* @smeSessionId:session id
* @flag: tdls flag
*
* Send TDLS Teardown frame on Direct link or AP link, depends on reason code.
*
* Return: None
*/
static inline QDF_STATUS
wma_tx_frame_with_tx_complete_send(tpAniSirGlobal pMac, void *pPacket,
uint16_t nBytes,
uint8_t tid,
uint8_t *pFrame,
uint8_t smeSessionId, bool flag)
{
return wma_tx_frameWithTxComplete(pMac, pPacket,
(uint16_t) nBytes,
TXRX_FRM_802_11_DATA,
ANI_TXDIR_TODS,
tid,
lim_tx_complete, pFrame,
lim_mgmt_tx_complete,
HAL_USE_BD_RATE2_FOR_MANAGEMENT_FRAME,
smeSessionId, flag, 0);
}
#else
static inline QDF_STATUS
wma_tx_frame_with_tx_complete_send(tpAniSirGlobal pMac, void *pPacket,
uint16_t nBytes,
uint8_t tid,
uint8_t *pFrame,
uint8_t smeSessionId, bool flag)
{
return wma_tx_frameWithTxComplete(pMac, pPacket,
(uint16_t) nBytes,
TXRX_FRM_802_11_DATA,
ANI_TXDIR_TODS,
tid,
lim_tx_complete, pFrame,
lim_mgmt_tx_complete,
HAL_USE_BD_RATE2_FOR_MANAGEMENT_FRAME,
smeSessionId, false, 0);
}
#endif
/*
* TDLS setup Request frame on AP link
*/
tSirRetStatus lim_send_tdls_link_setup_req_frame(tpAniSirGlobal pMac,
struct qdf_mac_addr peer_mac,
uint8_t dialog,
@ -1108,14 +1162,11 @@ tSirRetStatus lim_send_tdls_link_setup_req_frame(tpAniSirGlobal pMac,
pMac->lim.mgmtFrameSessionId = psessionEntry->peSessionId;
qdf_status = wma_tx_frameWithTxComplete(pMac, pPacket, (uint16_t) nBytes,
TXRX_FRM_802_11_DATA,
ANI_TXDIR_TODS,
TID_AC_VI,
lim_tx_complete, pFrame,
lim_mgmt_tx_complete,
HAL_USE_BD_RATE2_FOR_MANAGEMENT_FRAME,
smeSessionId, false, 0);
qdf_status = wma_tx_frame_with_tx_complete_send(pMac, pPacket,
(uint16_t) nBytes,
TID_AC_VI,
pFrame,
smeSessionId, true);
if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
pMac->lim.mgmtFrameSessionId = 0xff;
@ -1310,14 +1361,13 @@ tSirRetStatus lim_send_tdls_teardown_frame(tpAniSirGlobal pMac,
pMac->lim.mgmtFrameSessionId = psessionEntry->peSessionId;
qdf_status = wma_tx_frameWithTxComplete(pMac, pPacket, (uint16_t) nBytes,
TXRX_FRM_802_11_DATA,
ANI_TXDIR_TODS,
TID_AC_VI,
lim_tx_complete, pFrame,
lim_mgmt_tx_complete,
HAL_USE_BD_RATE2_FOR_MANAGEMENT_FRAME,
smeSessionId, false, 0);
qdf_status = wma_tx_frame_with_tx_complete_send(pMac, pPacket,
(uint16_t) nBytes,
TID_AC_VI,
pFrame,
smeSessionId,
(reason == eSIR_MAC_TDLS_TEARDOWN_PEER_UNREACHABLE)
? true : false);
if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
pMac->lim.mgmtFrameSessionId = 0xff;
@ -1588,14 +1638,11 @@ static tSirRetStatus lim_send_tdls_setup_rsp_frame(tpAniSirGlobal pMac,
pMac->lim.mgmtFrameSessionId = psessionEntry->peSessionId;
qdf_status = wma_tx_frameWithTxComplete(pMac, pPacket, (uint16_t) nBytes,
TXRX_FRM_802_11_DATA,
ANI_TXDIR_TODS,
TID_AC_VI,
lim_tx_complete, pFrame,
lim_mgmt_tx_complete,
HAL_USE_BD_RATE2_FOR_MANAGEMENT_FRAME,
smeSessionId, false, 0);
qdf_status = wma_tx_frame_with_tx_complete_send(pMac, pPacket,
(uint16_t) nBytes,
TID_AC_VI,
pFrame,
smeSessionId, true);
if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
pMac->lim.mgmtFrameSessionId = 0xff;
@ -1808,14 +1855,11 @@ tSirRetStatus lim_send_tdls_link_setup_cnf_frame(tpAniSirGlobal pMac,
pMac->lim.mgmtFrameSessionId = psessionEntry->peSessionId;
qdf_status = wma_tx_frameWithTxComplete(pMac, pPacket, (uint16_t) nBytes,
TXRX_FRM_802_11_DATA,
ANI_TXDIR_TODS,
TID_AC_VI,
lim_tx_complete, pFrame,
lim_mgmt_tx_complete,
HAL_USE_BD_RATE2_FOR_MANAGEMENT_FRAME,
smeSessionId, false, 0);
qdf_status = wma_tx_frame_with_tx_complete_send(pMac, pPacket,
(uint16_t) nBytes,
TID_AC_VI,
pFrame,
smeSessionId, true);
if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
pMac->lim.mgmtFrameSessionId = 0xff;