Merge "ARM: dts: msm: enable ESD status check for all panels in lahaina TVM"

This commit is contained in:
qctecmdr 2020-11-16 14:22:17 -08:00 • committed by Gerrit - the friendly Code Review server
commit b786c00212
3 changed files with 118 additions and 91 deletions

View file

@ -604,6 +604,8 @@ Optional properties:
- qcom,dsi-panel-gpio-pins: An u32 array consisting of all the GPIO pins used
for driving the DSI host and the panels
connected to the host.
- qcom,dsi-panel-gpio-names: A string array consisting of names of all the
GPIO pins used for driving the DSI host and panels.
- qcom,mdss-dsi-ext-bridge-mode: External bridge chip is connected instead of panel.
- qcom,mdss-dsi-dma-schedule-line: An integer value indicates the line number after vertical active
region for video mode panels and line number after TE for command mode
@ -790,6 +792,7 @@ Example:
qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
qcom,dsi-panel-gpio-pins = <12 24 82>;
qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio", "platform-te-gpio";
qcom,mdss-dsi-display-timings {
wqhd {

View file

@ -125,8 +125,16 @@
qcom,dsi-dyn-clk-enable;
qcom,dsi-dyn-clk-list = <606979440 604450359 601921278>;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
qcom,dsi-panel-gpio-pins = <12 24 82>;
qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio", "platform-te-gpio";
qcom,mdss-dsi-display-timings {
timing@0 {
@ -149,6 +157,17 @@
qcom,dsi-dyn-clk-list = <534712320 532484352 530256384>;
qcom,dsi-dyn-clk-type = "constant-fps-adjust-hfp";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
qcom,dsi-panel-gpio-pins = <12 24>;
qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio";
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 14 05 05 13 1f 05
@ -166,6 +185,11 @@
qcom,mdss-dsi-min-refresh-rate = <60>;
qcom,mdss-dsi-max-refresh-rate = <120>;
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
qcom,dsi-panel-gpio-pins = <12 24>;
qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio";
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1d 08 07 17 16 07
@ -179,6 +203,18 @@
&dsi_r66451_amoled_cmd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
qcom,dsi-panel-gpio-address = <0x0F100000 0x1000>;
qcom,dsi-panel-gpio-pins = <12 24 82>;
qcom,dsi-panel-gpio-names = "reg-gpio", "reset-gpio", "platform-te-gpio";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 12 1e 04
@ -232,6 +268,14 @@
&dsi_r66451_amoled_144hz_cmd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 22 09 09 19 17 09
@ -244,6 +288,15 @@
&dsi_sharp_4k_dsc_cmd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0c];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x77>;
qcom,mdss-dsi-panel-on-check-value = <0x77>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 13 12 05
@ -257,6 +310,15 @@
&dsi_sharp_4k_dsc_video {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0c];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x77>;
qcom,mdss-dsi-panel-on-check-value = <0x77>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 15 14 06
@ -269,6 +331,15 @@
&dsi_sharp_1080_cmd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 18 22 08
@ -282,6 +353,14 @@
&dsi_sharp_qsync_wqhd_cmd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 { /* WQHD 60FPS CMD */
qcom,mdss-dsi-panel-phy-timings = [00 0b 03 02 10 1c 03
@ -343,6 +422,14 @@
&dsi_sharp_qsync_wqhd_video {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 13 1e 05
@ -374,6 +461,15 @@
&dsi_dual_nt35597_truly_cmd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
/* DPHY regular margins */
@ -393,6 +489,15 @@
qcom,mdss-dsi-max-refresh-rate = <60>;
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 17 15 07
@ -407,6 +512,15 @@
&dsi_nt35695b_truly_fhd_cmd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
/* DPHY regular margins */

View file

@ -112,13 +112,6 @@
&dsi_sw43404_amoled_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,partial-update-enabled = "single_roi";
@ -127,74 +120,24 @@
};
};
&dsi_sw43404_amoled_video {
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_r66451_amoled_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_r66451_amoled_144hz_cmd {
qcom,ulps-enabled;
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
};
&dsi_sharp_4k_dsc_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0c];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x77>;
qcom,mdss-dsi-panel-on-check-value = <0x77>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_sharp_4k_dsc_video {
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0c];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x77>;
qcom,mdss-dsi-panel-on-check-value = <0x77>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_sharp_1080_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_sharp_qsync_wqhd_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
qcom,mdss-dsi-display-timings {
timing@0 { /* WQHD 60FPS CMD */
qcom,partial-update-enabled = "single_roi";
@ -223,45 +166,12 @@
};
};
&dsi_sharp_qsync_wqhd_video {
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_dual_nt35597_truly_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_dual_nt35597_truly_video {
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_nt35695b_truly_fhd_cmd {
qcom,ulps-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-on-check-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,esd-check-enabled;
};
&dsi_sim_cmd {