mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 03:27:44 -04:00
ARCH: drivers remove __dev* attributes.
This fixes up all of the smaller arches that had __dev* markings for their platform-specific drivers. CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Arnaldo Carvalho de Melo <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Cc: Haavard Skinnemoen <[email protected]> Cc: Hans-Christian Egtvedt <[email protected]> Cc: Mike Frysinger <[email protected]> Cc: Mikael Starvik <[email protected]> Cc: Jesper Nilsson <[email protected]> Cc: David Howells <[email protected]> Cc: Hirokazu Takata <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Michal Simek <[email protected]> Cc: Koichi Yasutake <[email protected]> Cc: Jonas Bonn <[email protected]> Cc: "James E.J. Bottomley" <[email protected]> Cc: Helge Deller <[email protected]> Cc: Martin Schwidefsky <[email protected]> Cc: Heiko Carstens <[email protected]> Cc: Chen Liqin <[email protected]> Cc: Lennox Wu <[email protected]> Cc: Paul Mundt <[email protected]> Cc: Chris Metcalf <[email protected]> Cc: Guan Xuetao <[email protected]> Cc: Bob Liu <[email protected]> Cc: Srinivas Kandagatla <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Myron Stowe <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Andrew Morton <[email protected]> Cc: Andi Kleen <[email protected]> Cc: Jesse Barnes <[email protected]> Cc: Sebastian Andrzej Siewior <[email protected]> Cc: Yinghai Lu <[email protected]> Cc: Thierry Reding <[email protected]> Cc: Greg Ungerer <[email protected]> Cc: Grant Likely <[email protected]> Cc: "Srivatsa S. Bhat" <[email protected]> Cc: Mark Salter <[email protected]> Cc: Yong Zhang <[email protected]> Cc: Michael Holzheu <[email protected]> Cc: Cornelia Huck <[email protected]> Cc: Jan Glauber <[email protected]> Cc: Wei Yongjun <[email protected]> Cc: Nobuhiro Iwamatsu <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
This commit is contained in:
parent
f8d6c8d98d
commit
b881bc469b
27 changed files with 74 additions and 90 deletions
|
|
@ -188,7 +188,7 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
|
|||
int __init tile_pci_init(void);
|
||||
int __init pcibios_init(void);
|
||||
|
||||
void __devinit pcibios_fixup_bus(struct pci_bus *bus);
|
||||
void pcibios_fixup_bus(struct pci_bus *bus);
|
||||
|
||||
#define pci_domain_nr(bus) (((struct pci_controller *)(bus)->sysdata)->index)
|
||||
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@ EXPORT_SYMBOL(pcibios_align_resource);
|
|||
* controller_id is the controller number, config type is 0 or 1 for
|
||||
* config0 or config1 operations.
|
||||
*/
|
||||
static int __devinit tile_pcie_open(int controller_id, int config_type)
|
||||
static int tile_pcie_open(int controller_id, int config_type)
|
||||
{
|
||||
char filename[32];
|
||||
int fd;
|
||||
|
|
@ -97,8 +97,7 @@ static int __devinit tile_pcie_open(int controller_id, int config_type)
|
|||
/*
|
||||
* Get the IRQ numbers from the HV and set up the handlers for them.
|
||||
*/
|
||||
static int __devinit tile_init_irqs(int controller_id,
|
||||
struct pci_controller *controller)
|
||||
static int tile_init_irqs(int controller_id, struct pci_controller *controller)
|
||||
{
|
||||
char filename[32];
|
||||
int fd;
|
||||
|
|
@ -237,7 +236,7 @@ static int tile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|||
}
|
||||
|
||||
|
||||
static void __devinit fixup_read_and_payload_sizes(void)
|
||||
static void fixup_read_and_payload_sizes(void)
|
||||
{
|
||||
struct pci_dev *dev = NULL;
|
||||
int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */
|
||||
|
|
@ -379,7 +378,7 @@ subsys_initcall(pcibios_init);
|
|||
/*
|
||||
* No bus fixups needed.
|
||||
*/
|
||||
void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
||||
void pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
/* Nothing needs to be done. */
|
||||
}
|
||||
|
|
@ -458,11 +457,8 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
|
|||
* specified bus & slot.
|
||||
*/
|
||||
|
||||
static int __devinit tile_cfg_read(struct pci_bus *bus,
|
||||
unsigned int devfn,
|
||||
int offset,
|
||||
int size,
|
||||
u32 *val)
|
||||
static int tile_cfg_read(struct pci_bus *bus, unsigned int devfn, int offset,
|
||||
int size, u32 *val)
|
||||
{
|
||||
struct pci_controller *controller = bus->sysdata;
|
||||
int busnum = bus->number & 0xff;
|
||||
|
|
@ -504,11 +500,8 @@ static int __devinit tile_cfg_read(struct pci_bus *bus,
|
|||
* See tile_cfg_read() for relevant comments.
|
||||
* Note that "val" is the value to write, not a pointer to that value.
|
||||
*/
|
||||
static int __devinit tile_cfg_write(struct pci_bus *bus,
|
||||
unsigned int devfn,
|
||||
int offset,
|
||||
int size,
|
||||
u32 val)
|
||||
static int tile_cfg_write(struct pci_bus *bus, unsigned int devfn, int offset,
|
||||
int size, u32 val)
|
||||
{
|
||||
struct pci_controller *controller = bus->sysdata;
|
||||
int busnum = bus->number & 0xff;
|
||||
|
|
|
|||
|
|
@ -58,10 +58,10 @@
|
|||
#define TRACE_CFG_RD(...)
|
||||
#endif
|
||||
|
||||
static int __devinitdata pci_probe = 1;
|
||||
static int pci_probe = 1;
|
||||
|
||||
/* Information on the PCIe RC ports configuration. */
|
||||
static int __devinitdata pcie_rc[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
|
||||
static int pcie_rc[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
|
||||
|
||||
/*
|
||||
* On some platforms with one or more Gx endpoint ports, we need to
|
||||
|
|
@ -72,7 +72,7 @@ static int __devinitdata pcie_rc[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
|
|||
* the delay in seconds. If the delay is not provided, the value
|
||||
* will be DEFAULT_RC_DELAY.
|
||||
*/
|
||||
static int __devinitdata rc_delay[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
|
||||
static int rc_delay[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
|
||||
|
||||
/* Default number of seconds that the PCIe RC port probe can be delayed. */
|
||||
#define DEFAULT_RC_DELAY 10
|
||||
|
|
@ -137,7 +137,7 @@ static int tile_irq_cpu(int irq)
|
|||
/*
|
||||
* Open a file descriptor to the TRIO shim.
|
||||
*/
|
||||
static int __devinit tile_pcie_open(int trio_index)
|
||||
static int tile_pcie_open(int trio_index)
|
||||
{
|
||||
gxio_trio_context_t *context = &trio_contexts[trio_index];
|
||||
int ret;
|
||||
|
|
@ -265,7 +265,7 @@ trio_handle_level_irq(unsigned int irq, struct irq_desc *desc)
|
|||
* Create kernel irqs and set up the handlers for the legacy interrupts.
|
||||
* Also some minimum initialization for the MSI support.
|
||||
*/
|
||||
static int __devinit tile_init_irqs(struct pci_controller *controller)
|
||||
static int tile_init_irqs(struct pci_controller *controller)
|
||||
{
|
||||
int i;
|
||||
int j;
|
||||
|
|
@ -459,8 +459,7 @@ static int tile_map_irq(const struct pci_dev *dev, u8 device, u8 pin)
|
|||
}
|
||||
|
||||
|
||||
static void __devinit fixup_read_and_payload_sizes(struct pci_controller *
|
||||
controller)
|
||||
static void fixup_read_and_payload_sizes(struct pci_controller *controller)
|
||||
{
|
||||
gxio_trio_context_t *trio_context = controller->trio;
|
||||
struct pci_bus *root_bus = controller->root_bus;
|
||||
|
|
@ -541,7 +540,7 @@ static void __devinit fixup_read_and_payload_sizes(struct pci_controller *
|
|||
}
|
||||
}
|
||||
|
||||
static int __devinit setup_pcie_rc_delay(char *str)
|
||||
static int setup_pcie_rc_delay(char *str)
|
||||
{
|
||||
unsigned long delay = 0;
|
||||
unsigned long trio_index;
|
||||
|
|
@ -1016,7 +1015,7 @@ alloc_mem_map_failed:
|
|||
subsys_initcall(pcibios_init);
|
||||
|
||||
/* Note: to be deleted after Linux 3.6 merge. */
|
||||
void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
||||
void pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
}
|
||||
|
||||
|
|
@ -1024,7 +1023,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
|||
* This can be called from the generic PCI layer, but doesn't need to
|
||||
* do anything.
|
||||
*/
|
||||
char __devinit *pcibios_setup(char *str)
|
||||
char *pcibios_setup(char *str)
|
||||
{
|
||||
if (!strcmp(str, "off")) {
|
||||
pci_probe = 0;
|
||||
|
|
@ -1143,11 +1142,8 @@ EXPORT_SYMBOL(pci_iounmap);
|
|||
* specified bus & device.
|
||||
*/
|
||||
|
||||
static int __devinit tile_cfg_read(struct pci_bus *bus,
|
||||
unsigned int devfn,
|
||||
int offset,
|
||||
int size,
|
||||
u32 *val)
|
||||
static int tile_cfg_read(struct pci_bus *bus, unsigned int devfn, int offset,
|
||||
int size, u32 *val)
|
||||
{
|
||||
struct pci_controller *controller = bus->sysdata;
|
||||
gxio_trio_context_t *trio_context = controller->trio;
|
||||
|
|
@ -1271,11 +1267,8 @@ invalid_device:
|
|||
* See tile_cfg_read() for relevent comments.
|
||||
* Note that "val" is the value to write, not a pointer to that value.
|
||||
*/
|
||||
static int __devinit tile_cfg_write(struct pci_bus *bus,
|
||||
unsigned int devfn,
|
||||
int offset,
|
||||
int size,
|
||||
u32 val)
|
||||
static int tile_cfg_write(struct pci_bus *bus, unsigned int devfn, int offset,
|
||||
int size, u32 val)
|
||||
{
|
||||
struct pci_controller *controller = bus->sysdata;
|
||||
gxio_trio_context_t *trio_context = controller->trio;
|
||||
|
|
|
|||
Loading…
Reference in a new issue