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x86_64: convert to clock events
Finally switch to the clockevents code. Share code with i386 for hpet and PIT. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Chris Wright <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Signed-off-by: Arjan van de Ven <[email protected]>
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Thomas Gleixner
Thomas Gleixner
parent
ba7eda4c60
commit
b8ce335906
9 changed files with 158 additions and 299 deletions
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#ifdef CONFIG_X86_32
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# include "hpet_32.h"
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#ifndef ASM_X86_HPET_H
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#define ASM_X86_HPET_H
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#ifdef CONFIG_HPET_TIMER
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/*
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* Documentation on HPET can be found at:
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* http://www.intel.com/ial/home/sp/pcmmspec.htm
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* ftp://download.intel.com/ial/home/sp/mmts098.pdf
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*/
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#define HPET_MMAP_SIZE 1024
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#define HPET_ID 0x000
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#define HPET_PERIOD 0x004
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#define HPET_CFG 0x010
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#define HPET_STATUS 0x020
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#define HPET_COUNTER 0x0f0
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#define HPET_T0_CFG 0x100
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#define HPET_T0_CMP 0x108
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#define HPET_T0_ROUTE 0x110
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#define HPET_T1_CFG 0x120
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#define HPET_T1_CMP 0x128
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#define HPET_T1_ROUTE 0x130
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#define HPET_T2_CFG 0x140
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#define HPET_T2_CMP 0x148
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#define HPET_T2_ROUTE 0x150
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#define HPET_ID_REV 0x000000ff
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#define HPET_ID_NUMBER 0x00001f00
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#define HPET_ID_64BIT 0x00002000
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#define HPET_ID_LEGSUP 0x00008000
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#define HPET_ID_VENDOR 0xffff0000
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#define HPET_ID_NUMBER_SHIFT 8
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#define HPET_ID_VENDOR_SHIFT 16
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#define HPET_ID_VENDOR_8086 0x8086
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#define HPET_CFG_ENABLE 0x001
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#define HPET_CFG_LEGACY 0x002
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#define HPET_LEGACY_8254 2
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#define HPET_LEGACY_RTC 8
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#define HPET_TN_LEVEL 0x0002
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#define HPET_TN_ENABLE 0x0004
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#define HPET_TN_PERIODIC 0x0008
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#define HPET_TN_PERIODIC_CAP 0x0010
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#define HPET_TN_64BIT_CAP 0x0020
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#define HPET_TN_SETVAL 0x0040
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#define HPET_TN_32BIT 0x0100
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#define HPET_TN_ROUTE 0x3e00
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#define HPET_TN_FSB 0x4000
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#define HPET_TN_FSB_CAP 0x8000
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#define HPET_TN_ROUTE_SHIFT 9
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/* Max HPET Period is 10^8 femto sec as in HPET spec */
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#define HPET_MAX_PERIOD 100000000UL
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/*
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* Min HPET period is 10^5 femto sec just for safety. If it is less than this,
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* then 32 bit HPET counter wrapsaround in less than 0.5 sec.
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*/
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#define HPET_MIN_PERIOD 100000UL
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/* hpet memory map physical address */
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extern unsigned long hpet_address;
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extern int is_hpet_enabled(void);
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extern int hpet_enable(void);
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#ifdef CONFIG_HPET_EMULATE_RTC
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#include <linux/interrupt.h>
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extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
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unsigned char sec);
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extern int hpet_set_periodic_freq(unsigned long freq);
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extern int hpet_rtc_dropped_irq(void);
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extern int hpet_rtc_timer_init(void);
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extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
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#endif /* CONFIG_HPET_EMULATE_RTC */
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#else
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# include "hpet_64.h"
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#endif
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static inline int hpet_enable(void) { return 0; }
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#endif /* CONFIG_HPET_TIMER */
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#endif /* ASM_X86_HPET_H */
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@ -1,90 +0,0 @@
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#ifndef _I386_HPET_H
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#define _I386_HPET_H
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#ifdef CONFIG_HPET_TIMER
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/*
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* Documentation on HPET can be found at:
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* http://www.intel.com/ial/home/sp/pcmmspec.htm
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* ftp://download.intel.com/ial/home/sp/mmts098.pdf
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*/
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#define HPET_MMAP_SIZE 1024
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#define HPET_ID 0x000
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#define HPET_PERIOD 0x004
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#define HPET_CFG 0x010
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#define HPET_STATUS 0x020
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#define HPET_COUNTER 0x0f0
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#define HPET_T0_CFG 0x100
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#define HPET_T0_CMP 0x108
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#define HPET_T0_ROUTE 0x110
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#define HPET_T1_CFG 0x120
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#define HPET_T1_CMP 0x128
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#define HPET_T1_ROUTE 0x130
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#define HPET_T2_CFG 0x140
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#define HPET_T2_CMP 0x148
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#define HPET_T2_ROUTE 0x150
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#define HPET_ID_REV 0x000000ff
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#define HPET_ID_NUMBER 0x00001f00
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#define HPET_ID_64BIT 0x00002000
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#define HPET_ID_LEGSUP 0x00008000
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#define HPET_ID_VENDOR 0xffff0000
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#define HPET_ID_NUMBER_SHIFT 8
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#define HPET_ID_VENDOR_SHIFT 16
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#define HPET_ID_VENDOR_8086 0x8086
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#define HPET_CFG_ENABLE 0x001
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#define HPET_CFG_LEGACY 0x002
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#define HPET_LEGACY_8254 2
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#define HPET_LEGACY_RTC 8
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#define HPET_TN_LEVEL 0x0002
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#define HPET_TN_ENABLE 0x0004
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#define HPET_TN_PERIODIC 0x0008
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#define HPET_TN_PERIODIC_CAP 0x0010
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#define HPET_TN_64BIT_CAP 0x0020
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#define HPET_TN_SETVAL 0x0040
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#define HPET_TN_32BIT 0x0100
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#define HPET_TN_ROUTE 0x3e00
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#define HPET_TN_FSB 0x4000
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#define HPET_TN_FSB_CAP 0x8000
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#define HPET_TN_ROUTE_SHIFT 9
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/* Max HPET Period is 10^8 femto sec as in HPET spec */
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#define HPET_MAX_PERIOD 100000000UL
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/*
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* Min HPET period is 10^5 femto sec just for safety. If it is less than this,
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* then 32 bit HPET counter wrapsaround in less than 0.5 sec.
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*/
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#define HPET_MIN_PERIOD 100000UL
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/* hpet memory map physical address */
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extern unsigned long hpet_address;
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extern int is_hpet_enabled(void);
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extern int hpet_enable(void);
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#ifdef CONFIG_HPET_EMULATE_RTC
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#include <linux/interrupt.h>
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extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
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extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
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unsigned char sec);
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extern int hpet_set_periodic_freq(unsigned long freq);
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extern int hpet_rtc_dropped_irq(void);
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extern int hpet_rtc_timer_init(void);
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extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
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#endif /* CONFIG_HPET_EMULATE_RTC */
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#else
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static inline int hpet_enable(void) { return 0; }
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#endif /* CONFIG_HPET_TIMER */
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#endif /* _I386_HPET_H */
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#ifndef _ASM_X8664_HPET_H
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#define _ASM_X8664_HPET_H 1
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#include <asm/hpet_32.h>
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#define HPET_TICK_RATE (HZ * 100000UL)
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extern int hpet_rtc_timer_init(void);
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extern int hpet_arch_init(void);
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extern int hpet_timer_stop_set_go(unsigned long tick);
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extern int hpet_reenable(void);
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extern unsigned int hpet_calibrate_tsc(void);
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extern int hpet_use_timer;
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extern unsigned long hpet_period;
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extern unsigned long hpet_tick;
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#endif
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