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[POWERPC] Xilinx: of_serial support for Xilinx uart 16550.

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The Xilinx 16550 uart core is not a standard 16550 because it uses
word-based addressing rather than byte-based addressing. With
additional properties it is compatible with the open firmware
'ns16550' compatible binding.

This code updates the of_serial driver to handle the reg-offset
and reg-shift properties to enable this core to be used.

Signed-off-by: John Linn <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Signed-off-by: Josh Boyer <[email protected]>
This commit is contained in:
John Linn 2008-04-03 10:22:19 +11:00 • committed by Josh Boyer
commit b912b5e2cf
2 changed files with 24 additions and 1 deletions
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14
drivers/serial/of_serial.c
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@ -31,7 +31,8 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev,
struct resource resource;
struct device_node *np = ofdev->node;
const unsigned int *clk, *spd;
int ret;
const u32 *prop;
int ret, prop_size;
memset(port, 0, sizeof *port);
spd = of_get_property(np, "current-speed", NULL);
@ -49,6 +50,17 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev,
spin_lock_init(&port->lock);
port->mapbase = resource.start;
/* Check for shifted address mapping */
prop = of_get_property(np, "reg-offset", &prop_size);
if (prop && (prop_size == sizeof(u32)))
port->mapbase += *prop;
/* Check for registers offset within the devices address range */
prop = of_get_property(np, "reg-shift", &prop_size);
if (prop && (prop_size == sizeof(u32)))
port->regshift = *prop;
port->irq = irq_of_parse_and_map(np, 0);
port->iotype = UPIO_MEM;
port->type = type;