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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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msm: pcie: support EQ preset request vector configuration
Provide the option to configure the request of preset during the initial part of the equalization master phase. Change-Id: Ib33e84b3d333bc7c7275dd7108ef37067d92abbd Signed-off-by: Tony Truong <truong@codeaurora.org>
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1 changed files with 15 additions and 0 deletions
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@ -46,6 +46,8 @@
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#define PCIE_GEN3_GEN2_CTRL (0x080c)
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#define PCIE_GEN3_RELATED (0x0890)
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#define PCIE_GEN3_EQ_CONTROL (0x08a8)
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#define PCIE_GEN3_EQ_PSET_REQ_VEC_MASK (GENMASK(23, 8))
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#define PCIE_GEN3_EQ_FB_MODE_DIR_CHANGE (0x08ac)
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#define PCIE_GEN3_MISC_CONTROL (0x08bc)
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@ -690,6 +692,7 @@ struct msm_pcie_dev_t {
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uint32_t phy_status_offset;
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uint32_t phy_status_bit;
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uint32_t phy_power_down_offset;
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uint32_t eq_pset_req_vec;
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uint32_t core_preset;
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uint32_t cpl_timeout;
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uint32_t current_bdf;
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@ -1284,6 +1287,8 @@ static void msm_pcie_show_status(struct msm_pcie_dev_t *dev)
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dev->phy_status_bit);
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PCIE_DBG_FS(dev, "phy_power_down_offset: 0x%x\n",
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dev->phy_power_down_offset);
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PCIE_DBG_FS(dev, "eq_pset_req_vec: 0x%x\n",
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dev->eq_pset_req_vec);
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PCIE_DBG_FS(dev, "core_preset: 0x%x\n",
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dev->core_preset);
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PCIE_DBG_FS(dev, "cpl_timeout: 0x%x\n",
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@ -3774,6 +3779,10 @@ static int msm_pcie_link_train(struct msm_pcie_dev_t *dev)
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msm_pcie_write_mask(dev->dm_core,
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PCIE_GEN3_EQ_CONTROL, 0x20);
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msm_pcie_write_mask(dev->dm_core + PCIE_GEN3_EQ_CONTROL,
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PCIE_GEN3_EQ_PSET_REQ_VEC_MASK,
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dev->eq_pset_req_vec);
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msm_pcie_write_mask(dev->dm_core +
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PCIE_GEN3_RELATED, BIT(0), 0);
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@ -5580,6 +5589,12 @@ static int msm_pcie_probe(struct platform_device *pdev)
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PCIE_DBG(pcie_dev, "RC%d: phy-power-down-offset: 0x%x.\n",
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pcie_dev->rc_idx, pcie_dev->phy_power_down_offset);
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of_property_read_u32(pdev->dev.of_node,
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"qcom,eq-pset-req-vec",
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&pcie_dev->eq_pset_req_vec);
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PCIE_DBG(pcie_dev, "RC%d: eq-pset-req-vec: 0x%x.\n",
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pcie_dev->rc_idx, pcie_dev->eq_pset_req_vec);
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pcie_dev->core_preset = PCIE_GEN3_PRESET_DEFAULT;
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of_property_read_u32(pdev->dev.of_node,
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"qcom,core-preset",
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