diff --git a/drivers/iommu/arm-smmu-debug.c b/drivers/iommu/arm-smmu-debug.c index 9434a8515b60..09ae0818332a 100644 --- a/drivers/iommu/arm-smmu-debug.c +++ b/drivers/iommu/arm-smmu-debug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. */ #include @@ -38,12 +38,13 @@ u32 arm_smmu_debug_tcu_testbus_select(phys_addr_t phys_addr, int ret = 0; if (testbus == CLK_TESTBUS) { - offset = ARM_SMMU_TESTBUS_SEL_HLOS1_NS; if (write) { + offset = ARM_SMMU_TESTBUS_SEL_HLOS1_NS; writel_relaxed(val, tcu_base + offset); /* Make sure tcu select register is written to */ wmb(); } else { + offset = ARM_SMMU_TCU_TESTBUS_HLOS1_NS; return readl_relaxed(tcu_base + offset); } } else { diff --git a/drivers/iommu/arm-smmu-debug.h b/drivers/iommu/arm-smmu-debug.h index c0f39965cc2f..cad03e0091a5 100644 --- a/drivers/iommu/arm-smmu-debug.h +++ b/drivers/iommu/arm-smmu-debug.h @@ -1,11 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. */ #define ARM_SMMU_TESTBUS_SEL 0x25E4 #define ARM_SMMU_TESTBUS 0x25E8 #define ARM_SMMU_TESTBUS_SEL_HLOS1_NS 0x8 +#define ARM_SMMU_TCU_TESTBUS_HLOS1_NS 0x28 #define DEBUG_TESTBUS_SEL_TBU 0x50 #define DEBUG_TESTBUS_TBU 0x58 @@ -21,7 +22,7 @@ #define TCU_PTW_QUEUE_MASK GENMASK(7, 0) #define TCU_CACHE_TESTBUS_SEL 0x1 #define TCU_CACHE_LOOKUP_QUEUE_SIZE 32 -#define TCU_CLK_TESTBUS_SEL 0x200 +#define TCU_CLK_TESTBUS_SEL 0x300 #define TBU_CLK_GATE_CONTROLLER_TESTBUS_SEL 0x1