From ecac9d6a6c9b7e177adb4bc13dff64f0f92655cb Mon Sep 17 00:00:00 2001 From: Shreyas K K Date: Mon, 1 Mar 2021 13:25:51 +0530 Subject: [PATCH] ARM: dts: msm: Disable NPU DCVS support on SA8195 There are stability issues seen if NPU DCVS support is enabled. Disable it as a temporary fix. Change-Id: I85d7496270015925246fa305cf5c6591c4e1157d --- qcom/sdmshrike.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi index 8b0d412d2ae0..d396e94a4a00 100644 --- a/qcom/sdmshrike.dtsi +++ b/qcom/sdmshrike.dtsi @@ -849,6 +849,7 @@ interconnects = <&compute_noc MASTER_NPU &mc_virt SLAVE_EBI1>; operating-points-v2 = <&ddr_bw_opp_table>; qcom,active-only; + status = "disabled"; }; npu_npu_ddr_bwmon: qcom,npu-npu-ddr-bwmon@9960300 { @@ -860,6 +861,7 @@ qcom,hw-timer-hz = <19200000>; qcom,target-dev = <&npu_npu_ddr_bw>; qcom,count-unit = <0x10000>; + status = "disabled"; }; cpu_pmu: cpu-pmu {