From ba262f666c007cf056ce12c1e895ad38bc77d3ca Mon Sep 17 00:00:00 2001 From: Ram Chandrasekar Date: Mon, 29 Jun 2020 10:11:24 -0700 Subject: [PATCH] dt-bindings: thermal: Add a property to account BCL threshold bit shift Newer BCL hardware doesn't have the threshold registers bit shifted compared to the ADC measurement register. Add a new flag qcom,pmic7-threshold, which needs to be added for these new targets so that the software driver will account for the bit shifting in the threshold calculation. Change-Id: I6bc33f14a2717e060c9d32d199df10cc269ca6f1 --- bindings/thermal/qcom-bcl-pmic5.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/bindings/thermal/qcom-bcl-pmic5.txt b/bindings/thermal/qcom-bcl-pmic5.txt index 20bb9829e470..814f161bd6ee 100644 --- a/bindings/thermal/qcom-bcl-pmic5.txt +++ b/bindings/thermal/qcom-bcl-pmic5.txt @@ -30,6 +30,12 @@ Required Parameters: "bcl-lvl1", "bcl-lvl2", +Optional Parameters: +- qcom,pmic7-threshold: + Value type: + Definition: When this flag is defined, the BCL driver will account for + no bit shift in the threshold registers. + Example: bcl@4200 { compatible = "qcom,bcl-v5"; @@ -38,4 +44,5 @@ Example: <0x2 0x42 0x1 IRQ_TYPE_NONE>; interrupt-names = "bcl-lvl0", "bcl-lvl1"; + qcom,pmic7-threshold; };