diff --git a/bindings/i2c/qcom,i2c-msm-geni.txt b/bindings/i2c/qcom,i2c-msm-geni.txt index 21edaa0cf621..c7f50543048a 100644 --- a/bindings/i2c/qcom,i2c-msm-geni.txt +++ b/bindings/i2c/qcom,i2c-msm-geni.txt @@ -17,6 +17,9 @@ Required properties: Optional property: - qcom,clk-freq-out : Desired I2C bus clock frequency in Hz. When missing default to 400000Hz. + - qcom,shared : Boolean flag to support multi-ee usecase, used in GSI mode. + Needs to be added by client driver node in case of multi-ee usecase. + - qcom,le-vm : Boolean flag to support I2C functionality in trusted VM. Child nodes should conform to i2c bus binding. diff --git a/qcom/trustedvm.dtsi b/qcom/trustedvm.dtsi index 9dda18d8f15e..d0bda932ad86 100644 --- a/qcom/trustedvm.dtsi +++ b/qcom/trustedvm.dtsi @@ -90,6 +90,64 @@ , ; }; + soc: soc { }; +}; + +&soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + /* + * QUPv3 Instances + * North 4 : SE 4 + */ + + /* QUPv3_0 wrapper instance: North QUP */ + qupv3_0: qcom,qupv3_0_geni_se@9c0000 { + compatible = "qcom,qupv3-geni-se"; + reg = <0x9c0000 0x2000>; + }; + + /* GPI */ + gpi_dma0: qcom,gpi-dma@900000 { + compatible = "qcom,gpi-dma"; + #dma-cells = <5>; + reg = <0x900000 0x60000>; + reg-names = "gpi-top"; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + qcom,max-num-gpii = <12>; + qcom,gpii-mask = <0x80>; + qcom,ev-factor = <2>; + qcom,gpi-ee-offset = <0x10000>; + status = "ok"; + }; + + /* I2C SE */ + qupv3_se4_i2c: i2c@990000 { + compatible = "qcom,i2c-geni"; + reg = <0x990000 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&gpi_dma0 0 4 3 64 0>, + <&gpi_dma0 1 4 3 64 0>; + dma-names = "tx", "rx"; + qcom,wrapper-core = <&qupv3_0>; + qcom,le-vm; + status = "ok"; + }; }; #include "trustedvm-ion.dtsi"