From c982ea2a0a9bf3ff5c0ff716b61c40672d832c12 Mon Sep 17 00:00:00 2001
From: Tony Truong <truong@quicinc.com>
Date: Wed, 5 Feb 2020 11:26:53 -0800
Subject: [PATCH] ARM: dts: msm: update PCIe0 and PCIe1 CLKREQ default func
 select on lahaina

Update PCIe0 and PCIe1 to use the correct reference for selecting
function 1 for CLKREQ on lahaina.

Change-Id: Iab9b05b1f324b02252853c0273403173b4d46e62
---
 qcom/lahaina-pinctrl.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/qcom/lahaina-pinctrl.dtsi b/qcom/lahaina-pinctrl.dtsi
index 12600bf53d18..af0bc11abfe2 100644
--- a/qcom/lahaina-pinctrl.dtsi
+++ b/qcom/lahaina-pinctrl.dtsi
@@ -1666,7 +1666,7 @@
 		pcie0_clkreq_default: pcie0_clkreq_default {
 			mux {
 				pins = "gpio95";
-				function = "pci_e0";
+				function = "pcie0_clkreqn";
 			};
 
 			config {
@@ -1707,7 +1707,7 @@
 		pcie1_clkreq_default: pcie1_clkreq_default {
 			mux {
 				pins = "gpio98";
-				function = "pci_e1";
+				function = "pcie1_clkreqn";
 			};
 
 			config {