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dt-bindings: arm: msm: update documentation for PCIe internal AUX CLK
PCIe internal AUX clock frequency used to be either 1MHz or 19.2MHz. The devicetree entry was a boolean type to determine which frequency to program in PCIe controller. Newer chipsets may support other frequencies such as 16.6MHz. Update the devicetree entry so that it accepts a decimal value for the desired frequency to be programmed in PCIe controller. Change-Id: I5818f5973ddbbce4268eafb6e99202daeba4234a
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1 changed files with 5 additions and 4 deletions
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@ -229,10 +229,12 @@ interconnects:
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link into l1ss sleep while idle in l1ss. If this is omitted,
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the default timeout is 100ms.
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- qcom,use-19p2mhz-aux-clk:
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- qcom,aux-clk-freq:
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Usage: optional
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Value type: <bool>
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Definition: Set PCIe AUX clock frequency to 19.2MHz
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Value type: <u32>
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Definition: Override reset value for PCIe internal aux clock frequency.
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Value will be the actual frequency rounded up to the nearest
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decimal. For example, use 17 for 16.6MHz.
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- qcom,common-clk-en:
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Usage: optional
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@ -504,7 +506,6 @@ Example
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qcom,link-check-max-count = <40> /* 200ms */
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qcom,boot-option = <0x1>;
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qcom,drv-supported;
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qcom,use-19p2mhz-aux-clk;
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qcom,common-clk-en;
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qcom,clk-power-manage-en;
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qcom,n-fts = <0x50>;
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