From bad91a965472d9b3b283fe2f4041b6ceeb0dc089 Mon Sep 17 00:00:00 2001 From: Karthik Kantamneni Date: Sun, 18 Jul 2021 22:25:04 +0530 Subject: [PATCH] qcacmn: Wait till EP vote is released after reg work completion After reg work is complete there is possiblity EP vote reset request still not processed by F.W. So wait till EP vote reset is done after reg work completion. Change-Id: I1f4e318ac96ba3a15c613c5faf5095d4be7c8e99 CRs-Fixed: 2994233 --- hif/inc/hif.h | 2 ++ hif/src/hif_main.c | 13 +++++++++++++ 2 files changed, 15 insertions(+) diff --git a/hif/inc/hif.h b/hif/inc/hif.h index de343149588c..3ffa9a28f0b1 100644 --- a/hif/inc/hif.h +++ b/hif/inc/hif.h @@ -47,6 +47,8 @@ typedef void *hif_handle_t; #if defined(HIF_IPCI) && defined(FEATURE_HAL_DELAYED_REG_WRITE) #define HIF_WORK_DRAIN_WAIT_CNT 50 + +#define HIF_EP_WAKE_RESET_WAIT_CNT 10 #endif #define HIF_TYPE_AR6002 2 diff --git a/hif/src/hif_main.c b/hif/src/hif_main.c index 68935b70a04d..0bb16f7bb7a8 100644 --- a/hif/src/hif_main.c +++ b/hif/src/hif_main.c @@ -52,6 +52,10 @@ #endif #include +#if defined(HIF_IPCI) && defined(FEATURE_HAL_DELAYED_REG_WRITE) +#include +#endif + void hif_dump(struct hif_opaque_softc *hif_ctx, uint8_t cmd_id, bool start) { hif_trigger_dump(hif_ctx, cmd_id, start); @@ -1032,6 +1036,7 @@ QDF_STATUS hif_try_prevent_ep_vote_access(struct hif_opaque_softc *hif_ctx) { struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); uint32_t work_drain_wait_cnt = 0; + uint32_t wait_cnt = 0; int work = 0; qdf_atomic_set(&scn->dp_ep_vote_access, @@ -1051,6 +1056,14 @@ QDF_STATUS hif_try_prevent_ep_vote_access(struct hif_opaque_softc *hif_ctx) qdf_sleep(10); } + while (pld_is_pci_ep_awake(scn->qdf_dev->dev)) { + if (++wait_cnt > HIF_EP_WAKE_RESET_WAIT_CNT) { + hif_err("Release EP vote is not proceed by Fw"); + return QDF_STATUS_E_FAULT; + } + qdf_sleep(5); + } + return QDF_STATUS_SUCCESS; }