From bb3ce26b4a8261c2919cca455eb08a9201df0f6f Mon Sep 17 00:00:00 2001
From: Asutosh Das <asutoshd@qti.qualcomm.com>
Date: Tue, 28 Jan 2020 02:36:41 -0800
Subject: [PATCH] ARM: dts: msm: Hot fix for Lahaina

This change adds reset handle for ufsphy.
It also disables lpm.

Change-Id: Ica5dc3c9983646d44b8c534f267138c2b790e841
---
 qcom/lahaina.dtsi | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index 24339c2dae5e..3369afeb6ced 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -1401,6 +1401,7 @@
 			"ref_aux_clk";
 		clocks = <&clock_rpmh RPMH_CXO_CLK>,
 			<&clock_gcc GCC_UFS_PHY_PHY_AUX_CLK>;
+		resets = <&ufshc_mem 0>;
 		status = "disabled";
 	};
 
@@ -1410,9 +1411,11 @@
 		interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 		phys = <&ufsphy_mem>;
 		phy-names = "ufsphy";
+		#reset-cells = <1>;
+
 		lanes-per-direction = <2>;
 		dev-ref-clk-freq = <0>; /* 19.2 MHz */
-
+		qcom,disable-lpm;
 		clock-names =
 			"core_clk",
 			"bus_aggr_clk",