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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6

Browse source 
Conflicts:
	drivers/scsi/fcoe/fcoe.c
This commit is contained in:
David S. Miller 2009-05-18 21:08:20 -07:00
commit bb803cfbec
1787 changed files with 38426 additions and 34527 deletions
Download patch file Download diff file Expand all files Collapse all files

4
drivers/pci/access.c
View file

@ -87,8 +87,8 @@ EXPORT_SYMBOL(pci_read_vpd);
* pci_write_vpd - Write entry to Vital Product Data
* @dev: pci device struct
* @pos: offset in vpd space
* @count: number of bytes to read
* @val: value to write
* @count: number of bytes to write
* @buf: buffer containing write data
*
*/
ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)

1
drivers/pci/htirq.c
View file

@ -158,6 +158,7 @@ int ht_create_irq(struct pci_dev *dev, int idx)
/**
* ht_destroy_irq - destroy an irq created with ht_create_irq
* @irq: irq to be destroyed
*
* This reverses ht_create_irq removing the specified irq from
* existence. The irq should be free before this happens.

13
drivers/pci/intel-iommu.c
View file

@ -59,6 +59,10 @@
#define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32))
#define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64))
#ifndef PHYSICAL_PAGE_MASK
#define PHYSICAL_PAGE_MASK PAGE_MASK
#endif
/* global iommu list, set NULL for ignored DMAR units */
static struct intel_iommu **g_iommus;
@ -1216,7 +1220,7 @@ static void dmar_init_reserved_ranges(void)
if (!r->flags || !(r->flags & IORESOURCE_MEM))
continue;
addr = r->start;
addr &= PAGE_MASK;
addr &= PHYSICAL_PAGE_MASK;
size = r->end - addr;
size = PAGE_ALIGN(size);
iova = reserve_iova(&reserved_iova_list, IOVA_PFN(addr),
@ -2173,7 +2177,8 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr,
* is not a big problem
*/
ret = domain_page_mapping(domain, start_paddr,
((u64)paddr) & PAGE_MASK, size, prot);
((u64)paddr) & PHYSICAL_PAGE_MASK,
size, prot);
if (ret)
goto error;
@ -2463,8 +2468,8 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int ne
addr = page_to_phys(sg_page(sg)) + sg->offset;
size = aligned_size((u64)addr, sg->length);
ret = domain_page_mapping(domain, start_addr + offset,
((u64)addr) & PAGE_MASK,
size, prot);
((u64)addr) & PHYSICAL_PAGE_MASK,
size, prot);
if (ret) {
/* clear the page */
dma_pte_clear_range(domain, start_addr,

8
drivers/pci/msi.c
View file

@ -455,8 +455,6 @@ static int msix_capability_init(struct pci_dev *dev,
entry->msi_attrib.default_irq = dev->irq;
entry->msi_attrib.pos = pos;
entry->mask_base = base;
entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE +
PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
msix_mask_irq(entry, 1);
list_add_tail(&entry->list, &dev->msi_list);
@ -493,6 +491,12 @@ static int msix_capability_init(struct pci_dev *dev,
msix_set_enable(dev, 1);
dev->msix_enabled = 1;
list_for_each_entry(entry, &dev->msi_list, list) {
int vector = entry->msi_attrib.entry_nr;
entry->masked = readl(base + vector * PCI_MSIX_ENTRY_SIZE +
PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
}
return 0;
}

12
drivers/pci/pci-sysfs.c
View file

@ -492,6 +492,7 @@ write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
/**
* pci_read_legacy_io - read byte(s) from legacy I/O port space
* @kobj: kobject corresponding to file to read from
* @bin_attr: struct bin_attribute for this file
* @buf: buffer to store results
* @off: offset into legacy I/O port space
* @count: number of bytes to read
@ -517,6 +518,7 @@ pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
/**
* pci_write_legacy_io - write byte(s) to legacy I/O port space
* @kobj: kobject corresponding to file to read from
* @bin_attr: struct bin_attribute for this file
* @buf: buffer containing value to be written
* @off: offset into legacy I/O port space
* @count: number of bytes to write
@ -733,9 +735,9 @@ pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
/**
* pci_remove_resource_files - cleanup resource files
* @dev: dev to cleanup
* @pdev: dev to cleanup
*
* If we created resource files for @dev, remove them from sysfs and
* If we created resource files for @pdev, remove them from sysfs and
* free their resources.
*/
static void
@ -793,9 +795,9 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
/**
* pci_create_resource_files - create resource files in sysfs for @dev
* @dev: dev in question
* @pdev: dev in question
*
* Walk the resources in @dev creating files for each resource available.
* Walk the resources in @pdev creating files for each resource available.
*/
static int pci_create_resource_files(struct pci_dev *pdev)
{
@ -829,6 +831,7 @@ void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
/**
* pci_write_rom - used to enable access to the PCI ROM display
* @kobj: kernel object handle
* @bin_attr: struct bin_attribute for this file
* @buf: user input
* @off: file offset
* @count: number of byte in input
@ -852,6 +855,7 @@ pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
/**
* pci_read_rom - read a PCI ROM
* @kobj: kernel object handle
* @bin_attr: struct bin_attribute for this file
* @buf: where to put the data we read from the ROM
* @off: file offset
* @count: number of bytes to read

70
drivers/pci/pci.c
View file

@ -681,11 +681,34 @@ EXPORT_SYMBOL(pci_choose_state);
#define PCI_EXP_SAVE_REGS 7
#define pcie_cap_has_devctl(type, flags) 1
#define pcie_cap_has_lnkctl(type, flags) \
((flags & PCI_EXP_FLAGS_VERS) > 1 || \
(type == PCI_EXP_TYPE_ROOT_PORT || \
type == PCI_EXP_TYPE_ENDPOINT || \
type == PCI_EXP_TYPE_LEG_END))
#define pcie_cap_has_sltctl(type, flags) \
((flags & PCI_EXP_FLAGS_VERS) > 1 || \
((type == PCI_EXP_TYPE_ROOT_PORT) || \
(type == PCI_EXP_TYPE_DOWNSTREAM && \
(flags & PCI_EXP_FLAGS_SLOT))))
#define pcie_cap_has_rtctl(type, flags) \
((flags & PCI_EXP_FLAGS_VERS) > 1 || \
(type == PCI_EXP_TYPE_ROOT_PORT || \
type == PCI_EXP_TYPE_RC_EC))
#define pcie_cap_has_devctl2(type, flags) \
((flags & PCI_EXP_FLAGS_VERS) > 1)
#define pcie_cap_has_lnkctl2(type, flags) \
((flags & PCI_EXP_FLAGS_VERS) > 1)
#define pcie_cap_has_sltctl2(type, flags) \
((flags & PCI_EXP_FLAGS_VERS) > 1)
static int pci_save_pcie_state(struct pci_dev *dev)
{
int pos, i = 0;
struct pci_cap_saved_state *save_state;
u16 *cap;
u16 flags;
pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
if (pos <= 0)
@ -698,13 +721,22 @@ static int pci_save_pcie_state(struct pci_dev *dev)
}
cap = (u16 *)&save_state->data[0];
pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
if (pcie_cap_has_devctl(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]);
if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]);
if (pcie_cap_has_sltctl(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]);
if (pcie_cap_has_rtctl(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]);
if (pcie_cap_has_devctl2(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]);
if (pcie_cap_has_lnkctl2(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
return 0;
}
@ -714,6 +746,7 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
int i = 0, pos;
struct pci_cap_saved_state *save_state;
u16 *cap;
u16 flags;
save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
@ -721,13 +754,22 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
return;
cap = (u16 *)&save_state->data[0];
pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
if (pcie_cap_has_devctl(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]);
if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
if (pcie_cap_has_sltctl(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
if (pcie_cap_has_rtctl(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
if (pcie_cap_has_devctl2(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]);
if (pcie_cap_has_lnkctl2(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
if (pcie_cap_has_sltctl2(dev->pcie_type, flags))
pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
}

3
drivers/pci/pcie/aer/aerdrv.h
View file

@ -95,6 +95,9 @@ struct aer_broadcast_data {
static inline pci_ers_result_t merge_result(enum pci_ers_result orig,
enum pci_ers_result new)
{
if (new == PCI_ERS_RESULT_NONE)
return orig;
switch (orig) {
case PCI_ERS_RESULT_CAN_RECOVER:
case PCI_ERS_RESULT_RECOVERED:

2
drivers/pci/pcie/portdrv_pci.c
View file

@ -200,7 +200,7 @@ static int slot_reset_iter(struct device *device, void *data)
static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
{
pci_ers_result_t status = PCI_ERS_RESULT_NONE;
pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
int retval;
/* If fatal, restore cfg space for possible link reset at upstream */

6
drivers/pci/probe.c
View file

@ -1118,10 +1118,6 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
return max;
}
void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b)
{
}
struct pci_bus * pci_create_bus(struct device *parent,
int bus, struct pci_ops *ops, void *sysdata)
{
@ -1180,8 +1176,6 @@ struct pci_bus * pci_create_bus(struct device *parent,
b->resource[0] = &ioport_resource;
b->resource[1] = &iomem_resource;
set_pci_bus_resources_arch_default(b);
return b;
dev_create_file_err:

1
drivers/pci/quirks.c
View file

@ -2033,6 +2033,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS400_200, quirk_di
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS480, quirk_disable_all_msi);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3336, quirk_disable_all_msi);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3351, quirk_disable_all_msi);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3364, quirk_disable_all_msi);
/* Disable MSI on chipsets that are known to not support it */
static void __devinit quirk_disable_msi(struct pci_dev *dev)

6
drivers/pci/setup-bus.c
View file

@ -536,11 +536,13 @@ static void pci_bus_dump_res(struct pci_bus *bus)
for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
struct resource *res = bus->resource[i];
if (!res)
if (!res || !res->end)
continue;
dev_printk(KERN_DEBUG, &bus->dev, "resource %d %s %pR\n", i,
(res->flags & IORESOURCE_IO) ? "io: " : "mem:", res);
(res->flags & IORESOURCE_IO) ? "io: " :
((res->flags & IORESOURCE_PREFETCH)? "pref mem":"mem:"),
res);
}
}

4
drivers/pci/slot.c
View file

@ -264,8 +264,8 @@ EXPORT_SYMBOL_GPL(pci_create_slot);
/**
* pci_renumber_slot - update %struct pci_slot -> number
* @slot - %struct pci_slot to update
* @slot_nr - new number for slot
* @slot: &struct pci_slot to update
* @slot_nr: new number for slot
*
* The primary purpose of this interface is to allow callers who earlier
* created a placeholder slot in pci_create_slot() by passing a -1 as