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ARM: late Exynos multiplatform changes

Browse source 
These continue the multiplatform support for exynos, adding support
 for building most of the essential drivers (clocksource, clk, irqchip)
 when combined with other platforms. As a result, it should become
 really easy to add full multiplatform exynos support in 3.11, although
 we don't yet enable it for 3.10.
 
 The changes were not included in the earlier multiplatform series
 in order to avoid clashes with the other Exynos updates.
 
 This also includes work from Tomasz Figa to fix the pwm clocksource
 code on Exynos, which is not strictly required for multiplatform,
 but related to the other patches in this set and needed as a bug
 fix for at least one board.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAUYgmgWCrR//JCVInAQIp6A//cb87A7biCHo0hd64v7RtX2dIvYTc8ZDh
 7O9yH7NuAtbSI7FF7cVQGGK6nCRqmwO2SM/KLFgbt2MF36FLgQKKZhJIDM/qB4jb
 3DCHHH814eqExf4MFfZL4Yxl4FaMqxzSwYX8fD28GmpeVxLeHjh0yQCKmPejz5MW
 WgkMcBJS3IPqbhhKMcMZmXteLrEzEm43Uj6dxkZP7RbinyuWzHvx3IWWv4gQ6ITz
 3jcCvZC5JWBo9MEPH43vlmOd8qsAn0OvkbtbYiy2Tre5VerqOgbEEXU2U0A2zUSj
 YTmRvwIGsIylL2EkVsJTkMj8KJ8TAHZjHyNUY8m2UzWuS+9EdZjf6rXeKIdUz9Wa
 0dmiWJEOEvejk0RnHEJm7anmKp7a9YHFkFSRnHbLOAXAMkUZWWcVAMZ4UbDK8RtF
 RX6R+ga9tR8R7aBLIzqYyfSHaZ7xUpF6nSBOM4GNVNKtViJv3PENWVQrm2GHcQ9w
 +4IMUqXO/5IRvuHW93l+oN8tENDTF0cR0+S7t0R6Vuuh7OebRt9TAE421Hrvt+7p
 gI5tvhEeV3o1CMmXWod8X1jxY/1OrONG7wX/x07ymiRnXSd+sZ0CPkYyWultKNw8
 bCAsnOP2aFpO1RB0XEC5y8FZ5uSfcQ7Ngu2kyAP7mEXV6qbSHgmb+lyxf2G8ftL2
 Rn0M7nbLcz4=
 =FY7+
 -----END PGP SIGNATURE-----

Merge tag 'multiplatform-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull late ARM Exynos multiplatform changes from Arnd Bergmann:
 "These continue the multiplatform support for exynos, adding support
  for building most of the essential drivers (clocksource, clk, irqchip)
  when combined with other platforms.  As a result, it should become
  really easy to add full multiplatform exynos support in 3.11, although
  we don't yet enable it for 3.10.

  The changes were not included in the earlier multiplatform series in
  order to avoid clashes with the other Exynos updates.

  This also includes work from Tomasz Figa to fix the pwm clocksource
  code on Exynos, which is not strictly required for multiplatform, but
  related to the other patches in this set and needed as a bug fix for
  at least one board."

* tag 'multiplatform-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
  ARM: dts: exynops4210: really add universal_c210 dts
  ARM: dts: exynos4210: Add basic dts file for universal_c210 board
  ARM: dts: exynos4: Add node for PWM device
  ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos
  clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core
  clocksource: samsung_pwm_timer: Correct programming of clock events
  clocksource: samsung_pwm_timer: Use proper clockevents max_delta
  clocksource: samsung_pwm_timer: Add support for non-DT platforms
  clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct
  clocksource: samsung_pwm_timer: Keep all driver data in a structure
  clocksource: samsung_pwm_timer: Make PWM spinlock global
  clocksource: samsung_pwm_timer: Let platforms select the driver
  Documentation: Add device tree bindings for Samsung PWM timers
  clocksource: add samsung pwm timer driver
  irqchip: exynos: look up irq using irq_find_mapping
  irqchip: exynos: pass irq_base from platform
  irqchip: exynos: localize irq lookup for ATAGS
  irqchip: exynos: allocate combiner_data dynamically
  irqchip: exynos: pass max combiner number to combiner_init
  ARM: exynos: add missing properties for combiner IRQs
  ...
This commit is contained in:
Linus Torvalds 2013-05-07 11:28:42 -07:00
commit bb9055b274
20 changed files with 1098 additions and 154 deletions
Download patch file Download diff file Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View file

@ -49,6 +49,7 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
exynos4210-universal_c210.dtb \
exynos4412-odroidx.dtb \
exynos4412-smdk4412.dtb \
exynos4412-origen.dtb \

8
arch/arm/boot/dts/exynos4.dtsi
View file

@ -336,6 +336,14 @@
status = "disabled";
};
pwm@139D0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
#pwm-cells = <2>;
status = "disabled";
};
amba {
#address-cells = <1>;
#size-cells = <1>;

352
arch/arm/boot/dts/exynos4210-universal_c210.dts Normal file
View file

@ -0,0 +1,352 @@
/*
* Samsung's Exynos4210 based Universal C210 board device tree source
*
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Device tree source file for Samsung's Universal C210 board which is based on
* Samsung's Exynos4210 rev0 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "exynos4210.dtsi"
/ {
model = "Samsung Universal C210 based on Exynos4210 rev0";
compatible = "samsung,universal_c210", "samsung,exynos4210";
memory {
reg = <0x40000000 0x10000000
0x50000000 0x10000000>;
};
chosen {
bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
};
mct@10050000 {
compatible = "none";
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <0>;
};
xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
vemmc_reg: voltage-regulator {
compatible = "regulator-fixed";
regulator-name = "VMEM_VDD_2_8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpe1 3 0>;
enable-active-high;
};
sdhci_emmc: sdhci@12510000 {
bus-width = <8>;
non-removable;
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
pinctrl-names = "default";
vmmc-supply = <&vemmc_reg>;
status = "okay";
};
serial@13800000 {
status = "okay";
};
serial@13810000 {
status = "okay";
};
serial@13820000 {
status = "okay";
};
serial@13830000 {
status = "okay";
};
gpio-keys {
compatible = "gpio-keys";
vol-up-key {
gpios = <&gpx2 0 1>;
linux,code = <115>;
label = "volume up";
debounce-interval = <1>;
};
vol-down-key {
gpios = <&gpx2 1 1>;
linux,code = <114>;
label = "volume down";
debounce-interval = <1>;
};
config-key {
gpios = <&gpx2 2 1>;
linux,code = <171>;
label = "config";
debounce-interval = <1>;
gpio-key,wakeup;
};
camera-key {
gpios = <&gpx2 3 1>;
linux,code = <212>;
label = "camera";
debounce-interval = <1>;
};
power-key {
gpios = <&gpx2 7 1>;
linux,code = <116>;
label = "power";
debounce-interval = <1>;
gpio-key,wakeup;
};
ok-key {
gpios = <&gpx3 5 1>;
linux,code = <352>;
label = "ok";
debounce-interval = <1>;
};
};
tsp_reg: voltage-regulator {
compatible = "regulator-fixed";
regulator-name = "TSP_2_8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpe2 3 0>;
enable-active-high;
};
i2c@13890000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
pinctrl-0 = <&i2c3_bus>;
pinctrl-names = "default";
status = "okay";
tsp@4a {
/* TBD: Atmel maXtouch touchscreen */
reg = <0x4a>;
};
};
i2c@138B0000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
pinctrl-0 = <&i2c5_bus>;
pinctrl-names = "default";
status = "okay";
vdd_arm_reg: pmic@60 {
compatible = "maxim,max8952";
reg = <0x60>;
max8952,vid-gpios = <&gpx0 3 0>, <&gpx0 4 0>;
max8952,default-mode = <0>;
max8952,dvs-mode-microvolt = <1250000>, <1200000>,
<1050000>, <950000>;
max8952,sync-freq = <0>;
max8952,ramp-speed = <0>;
regulator-name = "vdd_arm";
regulator-min-microvolt = <770000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
};
pmic@66 {
compatible = "national,lp3974";
reg = <0x66>;
max8998,pmic-buck1-default-dvs-idx = <0>;
max8998,pmic-buck1-dvs-gpios = <&gpx0 5 0>,
<&gpx0 6 0>;
max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>,
<1100000>, <1000000>;
max8998,pmic-buck2-default-dvs-idx = <0>;
max8998,pmic-buck2-dvs-gpio = <&gpe2 0 0>;
max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>;
regulators {
ldo2_reg: LDO2 {
regulator-name = "VALIVE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ldo3_reg: LDO3 {
regulator-name = "VUSB+MIPI_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
ldo4_reg: LDO4 {
regulator-name = "VADC_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo5_reg: LDO5 {
regulator-name = "VTF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
ldo6_reg: LDO6 {
regulator-name = "LDO6";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
};
ldo7_reg: LDO7 {
regulator-name = "VLCD+VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo8_reg: LDO8 {
regulator-name = "VUSB+VDAC_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo9_reg: LDO9 {
regulator-name = "VCC_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
ldo10_reg: LDO10 {
regulator-name = "VPLL_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-boot-on;
regulator-always-on;
};
ldo11_reg: LDO11 {
regulator-name = "CAM_AF_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo12_reg: LDO12 {
regulator-name = "PS_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
ldo13_reg: LDO13 {
regulator-name = "VHIC_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo14_reg: LDO14 {
regulator-name = "CAM_I_HOST_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo15_reg: LDO15 {
regulator-name = "CAM_S_DIG+FM33_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo16_reg: LDO16 {
regulator-name = "CAM_S_ANA_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
ldo17_reg: LDO17 {
regulator-name = "VCC_3.0V_LCD";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
buck1_reg: BUCK1 {
regulator-name = "VINT_1.1V";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
buck2_reg: BUCK2 {
regulator-name = "VG3D_1.1V";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
};
buck3_reg: BUCK3 {
regulator-name = "VCC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
buck4_reg: BUCK4 {
regulator-name = "VMEM_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ap32khz_reg: EN32KHz-AP {
regulator-name = "32KHz AP";
regulator-always-on;
};
cp32khz_reg: EN32KHz-CP {
regulator-name = "32KHz CP";
};
vichg_reg: ENVICHG {
regulator-name = "VICHG";
};
safeout1_reg: ESAFEOUT1 {
regulator-name = "SAFEOUT1";
regulator-always-on;
};
safeout2_reg: ESAFEOUT2 {
regulator-name = "SAFEOUT2";
regulator-boot-on;
};
};
};
};
pwm@139D0000 {
compatible = "samsung,s5p6440-pwm";
status = "okay";
};
};

1
arch/arm/boot/dts/exynos4210.dtsi
View file

@ -41,6 +41,7 @@
};
combiner:interrupt-controller@10440000 {
samsung,combiner-nr = <16>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,

9
arch/arm/boot/dts/exynos4212.dtsi
View file

@ -26,6 +26,15 @@
cpu-offset = <0x8000>;
};
interrupt-controller@10440000 {
samsung,combiner-nr = <18>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 107 0>, <0 108 0>;
};
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;

9
arch/arm/boot/dts/exynos4412.dtsi
View file

@ -26,6 +26,15 @@
cpu-offset = <0x4000>;
};
interrupt-controller@10440000 {
samsung,combiner-nr = <20>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
};
mct@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;

35
arch/arm/mach-exynos/common.c
View file

@ -452,13 +452,26 @@ void __init exynos_init_time(void)
} else {
/* todo: remove after migrating legacy E4 platforms to dt */
#ifdef CONFIG_ARCH_EXYNOS4
exynos4_clk_init(NULL);
exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, readl(S5P_VA_CHIPID + 8) & 1);
exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f);
#endif
mct_init();
mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0, EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1);
}
}
static unsigned int max_combiner_nr(void)
{
if (soc_is_exynos5250())
return EXYNOS5_MAX_COMBINER_NR;
else if (soc_is_exynos4412())
return EXYNOS4412_MAX_COMBINER_NR;
else if (soc_is_exynos4212())
return EXYNOS4212_MAX_COMBINER_NR;
else
return EXYNOS4210_MAX_COMBINER_NR;
}
void __init exynos4_init_irq(void)
{
unsigned int gic_bank_offset;
@ -473,14 +486,8 @@ void __init exynos4_init_irq(void)
#endif
if (!of_have_populated_dt())
combiner_init(S5P_VA_COMBINER_BASE, NULL);
/*
* The parameters of s5p_init_irq() are for VIC init.
* Theses parameters should be NULL and 0 because EXYNOS4
* uses GIC instead of VIC.
*/
s5p_init_irq(NULL, 0);
combiner_init(S5P_VA_COMBINER_BASE, NULL,
max_combiner_nr(), COMBINER_IRQ(0, 0));
gic_arch_extn.irq_set_wake = s3c_irq_wake;
}
@ -490,14 +497,6 @@ void __init exynos5_init_irq(void)
#ifdef CONFIG_OF
irqchip_init();
#endif
/*
* The parameters of s5p_init_irq() are for VIC init.
* Theses parameters should be NULL and 0 because EXYNOS4
* uses GIC instead of VIC.
*/
if (!of_machine_is_compatible("samsung,exynos5440"))
s5p_init_irq(NULL, 0);
gic_arch_extn.irq_set_wake = s3c_irq_wake;
}

7
arch/arm/mach-exynos/common.h
View file

@ -14,7 +14,7 @@
#include <linux/of.h>
extern void mct_init(void);
void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
void exynos_init_time(void);
extern unsigned long xxti_f, xusbxti_f;
@ -27,7 +27,7 @@ void exynos5_restart(char mode, const char *cmd);
void exynos_init_late(void);
/* ToDo: remove these after migrating legacy exynos4 platforms to dt */
void exynos4_clk_init(struct device_node *np);
void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem *reg_base, unsigned long xom);
void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
void exynos_firmware_init(void);
@ -71,7 +71,8 @@ void exynos4212_register_clocks(void);
#endif
struct device_node;
void combiner_init(void __iomem *combiner_base, struct device_node *np);
void combiner_init(void __iomem *combiner_base, struct device_node *np,
unsigned int max_nr, int irq_base);
extern struct smp_operations exynos_smp_ops;

4
arch/arm/plat-samsung/Kconfig
View file

@ -93,9 +93,9 @@ config SAMSUNG_IRQ_VIC_TIMER
Internal configuration to build the VIC timer interrupt code.
config S5P_IRQ
def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
help
Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
Support common interrupt part for ARCH_S5P SoCs
config S5P_EXT_INT
bool