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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: late Exynos multiplatform changes
These continue the multiplatform support for exynos, adding support for building most of the essential drivers (clocksource, clk, irqchip) when combined with other platforms. As a result, it should become really easy to add full multiplatform exynos support in 3.11, although we don't yet enable it for 3.10. The changes were not included in the earlier multiplatform series in order to avoid clashes with the other Exynos updates. This also includes work from Tomasz Figa to fix the pwm clocksource code on Exynos, which is not strictly required for multiplatform, but related to the other patches in this set and needed as a bug fix for at least one board. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUYgmgWCrR//JCVInAQIp6A//cb87A7biCHo0hd64v7RtX2dIvYTc8ZDh 7O9yH7NuAtbSI7FF7cVQGGK6nCRqmwO2SM/KLFgbt2MF36FLgQKKZhJIDM/qB4jb 3DCHHH814eqExf4MFfZL4Yxl4FaMqxzSwYX8fD28GmpeVxLeHjh0yQCKmPejz5MW WgkMcBJS3IPqbhhKMcMZmXteLrEzEm43Uj6dxkZP7RbinyuWzHvx3IWWv4gQ6ITz 3jcCvZC5JWBo9MEPH43vlmOd8qsAn0OvkbtbYiy2Tre5VerqOgbEEXU2U0A2zUSj YTmRvwIGsIylL2EkVsJTkMj8KJ8TAHZjHyNUY8m2UzWuS+9EdZjf6rXeKIdUz9Wa 0dmiWJEOEvejk0RnHEJm7anmKp7a9YHFkFSRnHbLOAXAMkUZWWcVAMZ4UbDK8RtF RX6R+ga9tR8R7aBLIzqYyfSHaZ7xUpF6nSBOM4GNVNKtViJv3PENWVQrm2GHcQ9w +4IMUqXO/5IRvuHW93l+oN8tENDTF0cR0+S7t0R6Vuuh7OebRt9TAE421Hrvt+7p gI5tvhEeV3o1CMmXWod8X1jxY/1OrONG7wX/x07ymiRnXSd+sZ0CPkYyWultKNw8 bCAsnOP2aFpO1RB0XEC5y8FZ5uSfcQ7Ngu2kyAP7mEXV6qbSHgmb+lyxf2G8ftL2 Rn0M7nbLcz4= =FY7+ -----END PGP SIGNATURE----- Merge tag 'multiplatform-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull late ARM Exynos multiplatform changes from Arnd Bergmann: "These continue the multiplatform support for exynos, adding support for building most of the essential drivers (clocksource, clk, irqchip) when combined with other platforms. As a result, it should become really easy to add full multiplatform exynos support in 3.11, although we don't yet enable it for 3.10. The changes were not included in the earlier multiplatform series in order to avoid clashes with the other Exynos updates. This also includes work from Tomasz Figa to fix the pwm clocksource code on Exynos, which is not strictly required for multiplatform, but related to the other patches in this set and needed as a bug fix for at least one board." * tag 'multiplatform-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits) ARM: dts: exynops4210: really add universal_c210 dts ARM: dts: exynos4210: Add basic dts file for universal_c210 board ARM: dts: exynos4: Add node for PWM device ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core clocksource: samsung_pwm_timer: Correct programming of clock events clocksource: samsung_pwm_timer: Use proper clockevents max_delta clocksource: samsung_pwm_timer: Add support for non-DT platforms clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct clocksource: samsung_pwm_timer: Keep all driver data in a structure clocksource: samsung_pwm_timer: Make PWM spinlock global clocksource: samsung_pwm_timer: Let platforms select the driver Documentation: Add device tree bindings for Samsung PWM timers clocksource: add samsung pwm timer driver irqchip: exynos: look up irq using irq_find_mapping irqchip: exynos: pass irq_base from platform irqchip: exynos: localize irq lookup for ATAGS irqchip: exynos: allocate combiner_data dynamically irqchip: exynos: pass max combiner number to combiner_init ARM: exynos: add missing properties for combiner IRQs ...
This commit is contained in:
Linus Torvalds
commit
bb9055b274
20 changed files with 1098 additions and 154 deletions
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@ -12,13 +12,16 @@
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/irqdomain.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <asm/mach/irq.h>
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#ifdef CONFIG_EXYNOS_ATAGS
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#include <plat/cpu.h>
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#endif
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#include "irqchip.h"
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@ -26,17 +29,18 @@
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#define COMBINER_ENABLE_CLEAR 0x4
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#define COMBINER_INT_STATUS 0xC
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#define IRQ_IN_COMBINER 8
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static DEFINE_SPINLOCK(irq_controller_lock);
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struct combiner_chip_data {
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unsigned int irq_offset;
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unsigned int hwirq_offset;
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unsigned int irq_mask;
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void __iomem *base;
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unsigned int parent_irq;
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};
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static struct irq_domain *combiner_irq_domain;
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static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
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static inline void __iomem *combiner_base(struct irq_data *data)
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{
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@ -77,11 +81,11 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
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if (status == 0)
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goto out;
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combiner_irq = __ffs(status);
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combiner_irq = chip_data->hwirq_offset + __ffs(status);
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cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq);
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cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
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if (unlikely(cascade_irq >= NR_IRQS))
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do_bad_IRQ(cascade_irq, desc);
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if (unlikely(!cascade_irq))
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do_bad_IRQ(irq, desc);
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else
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generic_handle_irq(cascade_irq);
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@ -113,40 +117,25 @@ static struct irq_chip combiner_chip = {
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#endif
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};
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static unsigned int max_combiner_nr(void)
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{
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if (soc_is_exynos5250())
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return EXYNOS5_MAX_COMBINER_NR;
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else if (soc_is_exynos4412())
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return EXYNOS4412_MAX_COMBINER_NR;
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else if (soc_is_exynos4212())
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return EXYNOS4212_MAX_COMBINER_NR;
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else
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return EXYNOS4210_MAX_COMBINER_NR;
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}
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static void __init combiner_cascade_irq(unsigned int combiner_nr,
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static void __init combiner_cascade_irq(struct combiner_chip_data *combiner_data,
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unsigned int irq)
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{
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if (combiner_nr >= max_combiner_nr())
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BUG();
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if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
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if (irq_set_handler_data(irq, combiner_data) != 0)
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BUG();
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irq_set_chained_handler(irq, combiner_handle_cascade_irq);
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}
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static void __init combiner_init_one(unsigned int combiner_nr,
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static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
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unsigned int combiner_nr,
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void __iomem *base, unsigned int irq)
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{
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combiner_data[combiner_nr].base = base;
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combiner_data[combiner_nr].irq_offset = irq_find_mapping(
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combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);
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combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
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combiner_data[combiner_nr].parent_irq = irq;
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combiner_data->base = base;
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combiner_data->hwirq_offset = (combiner_nr & ~3) * IRQ_IN_COMBINER;
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combiner_data->irq_mask = 0xff << ((combiner_nr % 4) << 3);
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combiner_data->parent_irq = irq;
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/* Disable all interrupts */
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__raw_writel(combiner_data[combiner_nr].irq_mask,
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base + COMBINER_ENABLE_CLEAR);
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__raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
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}
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#ifdef CONFIG_OF
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@ -162,7 +151,7 @@ static int combiner_irq_domain_xlate(struct irq_domain *d,
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if (intsize < 2)
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return -EINVAL;
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*out_hwirq = intspec[0] * MAX_IRQ_IN_COMBINER + intspec[1];
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*out_hwirq = intspec[0] * IRQ_IN_COMBINER + intspec[1];
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*out_type = 0;
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return 0;
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@ -181,6 +170,8 @@ static int combiner_irq_domain_xlate(struct irq_domain *d,
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static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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struct combiner_chip_data *combiner_data = d->host_data;
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irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq);
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irq_set_chip_data(irq, &combiner_data[hw >> 3]);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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@ -193,8 +184,12 @@ static struct irq_domain_ops combiner_irq_domain_ops = {
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.map = combiner_irq_domain_map,
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};
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static unsigned int exynos4x12_combiner_extra_irq(int group)
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static unsigned int combiner_lookup_irq(int group)
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{
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#ifdef CONFIG_EXYNOS_ATAGS
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if (group < EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
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return IRQ_SPI(group);
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switch (group) {
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case 16:
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return IRQ_SPI(107);
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@ -204,53 +199,46 @@ static unsigned int exynos4x12_combiner_extra_irq(int group)
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return IRQ_SPI(48);
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case 19:
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return IRQ_SPI(42);
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default:
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return 0;
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}
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#endif
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return 0;
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}
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void __init combiner_init(void __iomem *combiner_base,
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struct device_node *np)
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struct device_node *np,
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unsigned int max_nr,
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int irq_base)
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{
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int i, irq, irq_base;
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unsigned int max_nr, nr_irq;
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int i, irq;
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unsigned int nr_irq;
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struct combiner_chip_data *combiner_data;
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max_nr = max_combiner_nr();
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nr_irq = max_nr * IRQ_IN_COMBINER;
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if (np) {
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if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) {
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pr_info("%s: number of combiners not specified, "
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"setting default as %d.\n",
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__func__, max_nr);
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}
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combiner_data = kcalloc(max_nr, sizeof (*combiner_data), GFP_KERNEL);
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if (!combiner_data) {
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pr_warning("%s: could not allocate combiner data\n", __func__);
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return;
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}
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nr_irq = max_nr * MAX_IRQ_IN_COMBINER;
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irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);
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if (IS_ERR_VALUE(irq_base)) {
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irq_base = COMBINER_IRQ(0, 0);
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pr_warning("%s: irq desc alloc failed. Continuing with %d as linux irq base\n", __func__, irq_base);
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}
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combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0,
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&combiner_irq_domain_ops, &combiner_data);
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combiner_irq_domain = irq_domain_add_simple(np, nr_irq, irq_base,
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&combiner_irq_domain_ops, combiner_data);
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if (WARN_ON(!combiner_irq_domain)) {
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pr_warning("%s: irq domain init failed\n", __func__);
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return;
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}
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for (i = 0; i < max_nr; i++) {
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if (i < EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
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irq = IRQ_SPI(i);
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else
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irq = exynos4x12_combiner_extra_irq(i);
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#ifdef CONFIG_OF
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if (np)
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irq = irq_of_parse_and_map(np, i);
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else
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#endif
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combiner_init_one(i, combiner_base + (i >> 2) * 0x10, irq);
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combiner_cascade_irq(i, irq);
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irq = combiner_lookup_irq(i);
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combiner_init_one(&combiner_data[i], i,
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combiner_base + (i >> 2) * 0x10, irq);
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combiner_cascade_irq(&combiner_data[i], irq);
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}
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}
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@ -259,6 +247,8 @@ static int __init combiner_of_init(struct device_node *np,
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struct device_node *parent)
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{
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void __iomem *combiner_base;
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unsigned int max_nr = 20;
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int irq_base = -1;
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combiner_base = of_iomap(np, 0);
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if (!combiner_base) {
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@ -266,7 +256,20 @@ static int __init combiner_of_init(struct device_node *np,
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return -ENXIO;
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}
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combiner_init(combiner_base, np);
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if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) {
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pr_info("%s: number of combiners not specified, "
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"setting default as %d.\n",
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__func__, max_nr);
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}
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/*
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* FIXME: This is a hardwired COMBINER_IRQ(0,0). Once all devices
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* get their IRQ from DT, remove this in order to get dynamic
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* allocation.
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*/
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irq_base = 160;
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combiner_init(combiner_base, np, max_nr, irq_base);
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return 0;
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}
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