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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-07 04:12:04 -04:00
net: stmmac: Make code changes to support dlkm compilation
Replace ethqos function calls with function pointer in stmmac. Makefile changes to compile all ethqos files as single ko. Change-Id: Iae8fb981b59cf14e33d31530a8798cc56c0e9926 Signed-off-by: Sneh Shah <snehshah@codeaurora.org>
This commit is contained in:
parent
32339e54ac
commit
bbaefbdf62
8 changed files with 65 additions and 43 deletions
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@ -18,9 +18,8 @@ obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o
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obj-$(CONFIG_DWMAC_MEDIATEK) += dwmac-mediatek.o
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obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o
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obj-$(CONFIG_DWMAC_OXNAS) += dwmac-oxnas.o
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obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-gpio.o
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obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o
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obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-pps.o
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obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-eth.o
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dwmac-qcom-eth-objs := dwmac-qcom-ethqos.o dwmac-qcom-gpio.o dwmac-qcom-pps.o
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obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
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obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
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obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
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@ -113,7 +113,6 @@
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#define AUTONEG_STATE_MASK 0x20
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#define MICREL_LINK_UP_INTR_STATUS BIT(0)
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bool phy_intr_en;
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void *ipc_emac_log_ctxt;
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struct emac_emb_smmu_cb_ctx emac_emb_smmu_ctx = {0};
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@ -1011,6 +1010,7 @@ static irqreturn_t ETHQOS_PHY_ISR(int irq, void *dev_data)
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static int ethqos_phy_intr_enable(struct qcom_ethqos *ethqos)
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{
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int ret = 0;
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struct stmmac_priv *priv = qcom_ethqos_get_priv(ethqos);
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INIT_WORK(ðqos->emac_phy_work, ethqos_defer_phy_isr_work);
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init_completion(ðqos->clk_enable_done);
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@ -1022,7 +1022,7 @@ static int ethqos_phy_intr_enable(struct qcom_ethqos *ethqos)
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ethqos->phy_intr);
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return ret;
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}
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phy_intr_en = true;
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priv->plat->phy_intr_en_extn_stm = true;
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return ret;
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}
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@ -1103,7 +1103,7 @@ static void qcom_ethqos_phy_suspend_clks(struct qcom_ethqos *ethqos)
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ETHQOSINFO("Enter\n");
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if (phy_intr_en)
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if (priv->plat->phy_intr_en_extn_stm)
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reinit_completion(ðqos->clk_enable_done);
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ethqos->clks_suspended = 1;
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@ -1170,17 +1170,26 @@ static void qcom_ethqos_phy_resume_clks(struct qcom_ethqos *ethqos)
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ethqos->clks_suspended = 0;
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if (phy_intr_en)
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if (priv->plat->phy_intr_en_extn_stm)
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complete_all(ðqos->clk_enable_done);
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ETHQOSINFO("Exit\n");
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}
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void qcom_ethqos_request_phy_wol(struct plat_stmmacenet_data *plat)
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static void qcom_ethqos_request_phy_wol(void *plat_n)
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{
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struct qcom_ethqos *ethqos = plat->bsp_priv;
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struct platform_device *pdev = ethqos->pdev;
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct plat_stmmacenet_data *plat = plat_n;
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struct qcom_ethqos *ethqos;
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struct platform_device *pdev;
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struct net_device *ndev;
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if (!plat)
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return;
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ethqos = plat->bsp_priv;
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pdev = ethqos->pdev;
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ndev = platform_get_drvdata(pdev);
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ethqos->phy_wol_supported = 0;
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ethqos->phy_wol_wolopts = 0;
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@ -1615,6 +1624,9 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
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plat_dat->pmt = 1;
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plat_dat->tso_en = of_property_read_bool(np, "snps,tso");
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plat_dat->early_eth = ethqos->early_eth_enabled;
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plat_dat->handle_prv_ioctl = ethqos_handle_prv_ioctl;
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plat_dat->request_phy_wol = qcom_ethqos_request_phy_wol;
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plat_dat->init_pps = ethqos_init_pps;
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if (of_property_read_bool(pdev->dev.of_node,
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"emac-core-version")) {
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@ -1647,6 +1659,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
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}
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}
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plat_dat->stmmac_emb_smmu_ctx = emac_emb_smmu_ctx;
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ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
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if (ret)
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goto err_clk;
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@ -1703,18 +1717,21 @@ static int qcom_ethqos_remove(struct platform_device *pdev)
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{
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struct qcom_ethqos *ethqos;
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int ret;
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struct stmmac_priv *priv;
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ethqos = get_stmmac_bsp_priv(&pdev->dev);
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if (!ethqos)
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return -ENODEV;
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priv = qcom_ethqos_get_priv(pethqos);
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ret = stmmac_pltfr_remove(pdev);
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clk_disable_unprepare(ethqos->rgmii_clk);
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if (phy_intr_en)
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if (priv->plat->phy_intr_en_extn_stm)
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free_irq(ethqos->phy_intr, ethqos);
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if (phy_intr_en)
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if (priv->plat->phy_intr_en_extn_stm)
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cancel_work_sync(ðqos->emac_phy_work);
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emac_emb_smmu_exit();
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@ -309,5 +309,5 @@ struct dwmac_qcom_avb_algorithm {
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void dwmac_qcom_program_avb_algorithm(struct stmmac_priv *priv,
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struct ifr_data_struct *req);
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unsigned int dwmac_qcom_get_plat_tx_coal_frames(struct sk_buff *skb);
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void qcom_ethqos_request_phy_wol(struct plat_stmmacenet_data *plat);
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int ethqos_init_pps(void *priv);
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#endif
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@ -254,11 +254,17 @@ int ppsout_config(struct stmmac_priv *priv, struct pps_cfg *eth_pps_cfg)
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return 0;
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}
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int ethqos_init_pps(struct stmmac_priv *priv)
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int ethqos_init_pps(void *priv_n)
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{
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struct stmmac_priv *priv;
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u32 value;
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struct pps_cfg eth_pps_cfg = {0};
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if (!priv_n)
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return -ENODEV;
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priv = priv_n;
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priv->ptpaddr = priv->ioaddr + PTP_GMAC4_OFFSET;
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value = (PTP_TCR_TSENA | PTP_TCR_TSCFUPDT | PTP_TCR_TSUPDT);
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priv->hw->ptp->config_hw_tstamping(priv->ptpaddr, value);
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@ -249,27 +249,8 @@ enum stmmac_state {
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STMMAC_SERVICE_SCHED,
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};
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struct emac_emb_smmu_cb_ctx {
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bool valid;
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struct platform_device *pdev_master;
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struct platform_device *smmu_pdev;
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struct dma_iommu_mapping *mapping;
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struct iommu_domain *iommu_domain;
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u32 va_start;
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u32 va_size;
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u32 va_end;
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int ret;
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};
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extern struct emac_emb_smmu_cb_ctx emac_emb_smmu_ctx;
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#define GET_MEM_PDEV_DEV (emac_emb_smmu_ctx.valid ? \
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&emac_emb_smmu_ctx.smmu_pdev->dev : priv->device)
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int ethqos_handle_prv_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
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int ethqos_init_pps(struct stmmac_priv *priv);
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extern bool phy_intr_en;
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void qcom_ethqos_request_phy_wol(struct plat_stmmacenet_data *plat_dat);
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#define GET_MEM_PDEV_DEV (priv->plat->stmmac_emb_smmu_ctx.valid ? \
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&priv->plat->stmmac_emb_smmu_ctx.smmu_pdev->dev : priv->device)
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int stmmac_mdio_unregister(struct net_device *ndev);
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int stmmac_mdio_register(struct net_device *ndev);
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@ -1096,7 +1096,7 @@ static int stmmac_init_phy(struct net_device *dev)
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return -ENODEV;
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}
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ret = phylink_connect_phy(priv->phylink, priv->phydev);
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if (phy_intr_en) {
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if (priv->plat->phy_intr_en_extn_stm) {
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priv->phydev->irq = PHY_IGNORE_INTERRUPT;
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priv->phydev->interrupts = PHY_INTERRUPT_ENABLED;
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if (priv->phydev->drv->ack_interrupt &&
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@ -1113,7 +1113,7 @@ static int stmmac_init_phy(struct net_device *dev)
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!priv->phydev->drv->config_intr(priv->phydev)) {
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pr_err(" qcom-ethqos: %s config_phy_intr successful aftre connect\n",
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__func__);
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qcom_ethqos_request_phy_wol(priv->plat);
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priv->plat->request_phy_wol(priv->plat);
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}
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} else {
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pr_info("stmmac phy polling mode\n");
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@ -2692,7 +2692,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)
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clk_set_rate(priv->plat->clk_ptp_ref,
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priv->plat->clk_ptp_rate);
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ret = ethqos_init_pps(priv);
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ret = priv->plat->init_pps(priv);
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}
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priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
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@ -4073,12 +4073,14 @@ static void stmmac_poll_controller(struct net_device *dev)
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*/
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static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
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{
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struct stmmac_priv *priv = netdev_priv (dev);
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int ret = -EOPNOTSUPP;
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struct stmmac_priv *priv;
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if (!netif_running(dev))
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return -EINVAL;
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priv = netdev_priv(dev);
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switch (cmd) {
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case SIOCGMIIPHY:
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case SIOCGMIIREG:
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@ -4091,7 +4093,7 @@ static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
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case SIOCGHWTSTAMP:
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ret = stmmac_hwtstamp_get(dev, rq);
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case SIOCDEVPRIVATE:
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ret = ethqos_handle_prv_ioctl(dev, rq, cmd);
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ret = priv->plat->handle_prv_ioctl(dev, rq, cmd);
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break;
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default:
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break;
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@ -266,9 +266,8 @@ int stmmac_mdio_reset(struct mii_bus *bus)
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unsigned int mii_address = priv->hw->mii.addr;
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bool active_high = true;
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#ifdef CONFIG_DWMAC_QCOM_ETHQOS
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active_high = false;
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#endif
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if (priv->plat->early_eth)
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return 0;
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@ -128,6 +128,18 @@ struct stmmac_txq_cfg {
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u32 prio;
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};
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struct emac_emb_smmu_cb_ctx {
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bool valid;
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struct platform_device *pdev_master;
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struct platform_device *smmu_pdev;
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struct dma_iommu_mapping *mapping;
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struct iommu_domain *iommu_domain;
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u32 va_start;
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u32 va_size;
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u32 va_end;
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int ret;
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};
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struct plat_stmmacenet_data {
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int bus_id;
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int phy_addr;
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@ -187,5 +199,11 @@ struct plat_stmmacenet_data {
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unsigned int (*get_plat_tx_coal_frames)
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(struct sk_buff *skb);
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bool early_eth;
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struct emac_emb_smmu_cb_ctx stmmac_emb_smmu_ctx;
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bool phy_intr_en_extn_stm;
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int (*handle_prv_ioctl)(struct net_device *dev, struct ifreq *ifr,
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int cmd);
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void (*request_phy_wol)(void *plat);
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int (*init_pps)(void *priv);
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};
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#endif
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