ARM: dts: msm: Enable CVP SMMU fault tolerance and Stall disable

"non-fatal" -> smmu will not bug_on for s1 fault.
Avoid system crash when CVP SMMU fault happens.
CVP SSR can recover SMMU fault now
"stall-disable" -> smmu terminates pending transaction
Invokes smmu_fault_handler and triggers vnoc interrupt
independently. So firmware can quickly write sys_error
pkt(previous transactions were not stalled for that CB)
to message queue.

Change-Id: I749741801dcf2599ccd3b51b53c326629adaebfb
This commit is contained in:
Haseeb Khan 2021-03-15 10:50:37 +05:30
commit bbd1fae265

View file

@ -64,6 +64,7 @@
buffer-types = <0xfff>;
dma-coherent-hint-cached;
qcom,iommu-dma-addr-pool = <0x4b000000 0x90000000>;
qcom,iommu-faults = "non-fatal", "stall-disable";
};
@ -75,6 +76,7 @@
buffer-types = <0x741>;
qcom,iommu-dma-addr-pool = <0x01000000 0x25800000>;
qcom,iommu-vmid = <0xB>;
qcom,iommu-faults = "non-fatal", "stall-disable";
};
cvp_secure_pixel_cb {
@ -85,6 +87,7 @@
buffer-types = <0x106>;
qcom,iommu-dma-addr-pool = <0x26800000 0x24800000>;
qcom,iommu-vmid = <0xA>;
qcom,iommu-faults = "non-fatal", "stall-disable";
};
/* Memory Heaps */