Merge "msm: ipa3: Define gsi scratch reg 1 for gsi v1 targets"

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qctecmdr 2021-01-13 00:04:50 -08:00 • committed by Gerrit - the friendly Code Review server
commit bbf70405ea

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@ -747,6 +747,8 @@
#define GSI_EE_n_GSI_EE_GENERIC_CMD_VIRT_CHAN_IDX_SHFT 0x5
#define GSI_EE_n_GSI_EE_GENERIC_CMD_EE_BMSK 0x3c00
#define GSI_EE_n_GSI_EE_GENERIC_CMD_EE_SHFT 0xa
#define GSI_EE_n_GSI_EE_GENERIC_CMD_PARAM_BMSK 0xff000000
#define GSI_EE_n_GSI_EE_GENERIC_CMD_PARAM_SHFT 0x18
#define GSI_V1_0_EE_n_GSI_HW_PARAM_OFFS(n) \
(GSI_GSI_REG_BASE_OFFS + 0x0001f040 + 0x4000 * (n))
@ -1175,6 +1177,11 @@
#define GSI_EE_n_CNTXT_SCRATCH_0_SCRATCH_BMSK 0xffffffff
#define GSI_EE_n_CNTXT_SCRATCH_0_SCRATCH_SHFT 0x0
#define GSI_EE_n_CNTXT_SCRATCH_1_OFFS(n) \
(GSI_GSI_REG_BASE_OFFS + 0x0001f404 + 0x4000 * (n))
#define GSI_EE_n_CNTXT_SCRATCH_1_SCRATCH_BMSK 0xffffffff
#define GSI_EE_n_CNTXT_SCRATCH_1_SCRATCH_SHFT 0x0
#define GSI_INTER_EE_n_SRC_GSI_CH_IRQ_OFFS(n) \
(GSI_GSI_REG_BASE_OFFS + 0x0000c018 + 0x1000 * (n))
#define GSI_INTER_EE_n_SRC_GSI_CH_IRQ_GSI_CH_BIT_MAP_BMSK 0xffffffff