mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
dmaengine: DW DMAC: add multi-block property to device tree
Several versions of DW DMAC have multi block transfers hardware support. Hardware support of multi block transfers is disabled by default if we use DT to configure DMAC and software emulation of multi block transfers used instead. Add multi-block property, so it is possible to enable hardware multi block transfers (if present) via DT. Switch from per device is_nollp variable to multi_block array to be able enable/disable multi block transfers separately per channel. Acked-by: Andy Shevchenko <[email protected]> Signed-off-by: Eugeniy Paltsev <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
This commit is contained in:
parent
258f2277a9
commit
bd2c6636cc
8 changed files with 23 additions and 6 deletions
|
|
@ -1569,7 +1569,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
|
|||
(dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0;
|
||||
} else {
|
||||
dwc->block_size = pdata->block_size;
|
||||
dwc->nollp = pdata->is_nollp;
|
||||
dwc->nollp = !pdata->multi_block[i];
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ dw_dma_parse_dt(struct platform_device *pdev)
|
|||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct dw_dma_platform_data *pdata;
|
||||
u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];
|
||||
u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS];
|
||||
u32 nr_masters;
|
||||
u32 nr_channels;
|
||||
|
||||
|
|
@ -118,6 +118,8 @@ dw_dma_parse_dt(struct platform_device *pdev)
|
|||
|
||||
if (of_property_read_u32(np, "dma-channels", &nr_channels))
|
||||
return NULL;
|
||||
if (nr_channels > DW_DMA_MAX_NR_CHANNELS)
|
||||
return NULL;
|
||||
|
||||
pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
|
||||
if (!pdata)
|
||||
|
|
@ -152,6 +154,14 @@ dw_dma_parse_dt(struct platform_device *pdev)
|
|||
pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
|
||||
}
|
||||
|
||||
if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) {
|
||||
for (tmp = 0; tmp < nr_channels; tmp++)
|
||||
pdata->multi_block[tmp] = mb[tmp];
|
||||
} else {
|
||||
for (tmp = 0; tmp < nr_channels; tmp++)
|
||||
pdata->multi_block[tmp] = 1;
|
||||
}
|
||||
|
||||
return pdata;
|
||||
}
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -12,7 +12,8 @@
|
|||
#include <linux/interrupt.h>
|
||||
#include <linux/dmaengine.h>
|
||||
|
||||
#define DW_DMA_MAX_NR_CHANNELS 8
|
||||
#include "internal.h"
|
||||
|
||||
#define DW_DMA_MAX_NR_REQUESTS 16
|
||||
|
||||
/* flow controller */
|
||||
|
|
|
|||
Loading…
Reference in a new issue