From bd6e2805bfe2cd882ee410c41cace662c41798d8 Mon Sep 17 00:00:00 2001 From: Nisha Menon Date: Wed, 2 Sep 2020 22:58:51 -0700 Subject: [PATCH] qcacld-3.0: Update the gold core latency on clearing cpu_mask Set the latency of gold cores to default on clearing the cpu_mask for gold cores. This ensures that power drain on gold cores is minimal after gold core affinity is removed after traffic reduces. Change-Id: I4f17e9b9e36c57ac22a12e3abbc0155eef238a04 CRs-Fixed: 2764803 --- core/hdd/src/wlan_hdd_main.c | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/core/hdd/src/wlan_hdd_main.c b/core/hdd/src/wlan_hdd_main.c index 51a041c3baae..e90a5feed334 100644 --- a/core/hdd/src/wlan_hdd_main.c +++ b/core/hdd/src/wlan_hdd_main.c @@ -9455,16 +9455,35 @@ static inline void hdd_pm_qos_update_request(struct hdd_context *hdd_ctx, int cpu; unsigned int latency; - cpumask_copy(&hdd_ctx->qos_cpu_mask, pm_qos_cpu_mask); + qdf_cpumask_copy(&hdd_ctx->qos_cpu_mask, pm_qos_cpu_mask); - if (cpumask_empty(pm_qos_cpu_mask)) + if (qdf_cpumask_empty(pm_qos_cpu_mask)) { latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; - else + qdf_for_each_possible_cpu(cpu) { + dev_pm_qos_update_request( + &hdd_ctx->pm_qos_req[cpu], + latency); + } + hdd_debug("Empty mask %*pb: Set latency %u", + qdf_cpumask_pr_args(&hdd_ctx->qos_cpu_mask), + latency); + } else { latency = HDD_PM_QOS_HIGH_TPUT_LATENCY_US; - - for_each_cpu(cpu, &hdd_ctx->qos_cpu_mask) { - dev_pm_qos_update_request(&hdd_ctx->pm_qos_req[cpu], - latency); + /* Set latency to default for CPUs not included in mask */ + qdf_for_each_cpu_not(cpu, &hdd_ctx->qos_cpu_mask) { + dev_pm_qos_update_request( + &hdd_ctx->pm_qos_req[cpu], + PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE); + } + /* Set latency to 1 for CPUs included in mask */ + qdf_for_each_cpu(cpu, &hdd_ctx->qos_cpu_mask) { + dev_pm_qos_update_request( + &hdd_ctx->pm_qos_req[cpu], + latency); + } + hdd_debug("For qos_cpu_mask %*pb set latency %u", + qdf_cpumask_pr_args(&hdd_ctx->qos_cpu_mask), + latency); } }