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Merge "msm: kgsl: Add A660 hardware clock gating register values"

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qctecmdr 2020-03-02 00:26:49 -08:00 • committed by Gerrit - the friendly Code Review server
commit bdbcfb1ea2
1 changed files with 53 additions and 2 deletions
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55
drivers/gpu/msm/adreno-gpulist.h
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@ -1438,6 +1438,57 @@ static const struct adreno_a6xx_core adreno_gpu_core_a610 = {
.highest_bank_bit = 14,
};
static const struct adreno_reglist a660_hwcg_regs[] = {
{A6XX_RBBM_CLOCK_CNTL_SP0, 0x02222222},
{A6XX_RBBM_CLOCK_CNTL2_SP0, 0x02222220},
{A6XX_RBBM_CLOCK_DELAY_SP0, 0x00000080},
{A6XX_RBBM_CLOCK_HYST_SP0, 0x0000F3CF},
{A6XX_RBBM_CLOCK_CNTL_TP0, 0x22222222},
{A6XX_RBBM_CLOCK_CNTL2_TP0, 0x22222222},
{A6XX_RBBM_CLOCK_CNTL3_TP0, 0x22222222},
{A6XX_RBBM_CLOCK_CNTL4_TP0, 0x00022222},
{A6XX_RBBM_CLOCK_DELAY_TP0, 0x11111111},
{A6XX_RBBM_CLOCK_DELAY2_TP0, 0x11111111},
{A6XX_RBBM_CLOCK_DELAY3_TP0, 0x11111111},
{A6XX_RBBM_CLOCK_DELAY4_TP0, 0x00011111},
{A6XX_RBBM_CLOCK_HYST_TP0, 0x77777777},
{A6XX_RBBM_CLOCK_HYST2_TP0, 0x77777777},
{A6XX_RBBM_CLOCK_HYST3_TP0, 0x77777777},
{A6XX_RBBM_CLOCK_HYST4_TP0, 0x00077777},
{A6XX_RBBM_CLOCK_CNTL_RB0, 0x22222222},
{A6XX_RBBM_CLOCK_CNTL2_RB0, 0x01002222},
{A6XX_RBBM_CLOCK_CNTL_CCU0, 0x00002220},
{A6XX_RBBM_CLOCK_HYST_RB_CCU0, 0x00040F00},
{A6XX_RBBM_CLOCK_CNTL_RAC, 0x25222022},
{A6XX_RBBM_CLOCK_CNTL2_RAC, 0x00005555},
{A6XX_RBBM_CLOCK_DELAY_RAC, 0x00000011},
{A6XX_RBBM_CLOCK_HYST_RAC, 0x00445044},
{A6XX_RBBM_CLOCK_CNTL_TSE_RAS_RBBM, 0x04222222},
{A6XX_RBBM_CLOCK_MODE_VFD, 0x00002222},
{A6XX_RBBM_CLOCK_MODE_GPC, 0x00222222},
{A6XX_RBBM_CLOCK_DELAY_HLSQ_2, 0x00000002},
{A6XX_RBBM_CLOCK_MODE_HLSQ, 0x00002222},
{A6XX_RBBM_CLOCK_DELAY_TSE_RAS_RBBM, 0x00004000},
{A6XX_RBBM_CLOCK_DELAY_VFD, 0x00002222},
{A6XX_RBBM_CLOCK_DELAY_GPC, 0x00000200},
{A6XX_RBBM_CLOCK_DELAY_HLSQ, 0x00000000},
{A6XX_RBBM_CLOCK_HYST_TSE_RAS_RBBM, 0x00000000},
{A6XX_RBBM_CLOCK_HYST_VFD, 0x00000000},
{A6XX_RBBM_CLOCK_HYST_GPC, 0x04104004},
{A6XX_RBBM_CLOCK_HYST_HLSQ, 0x00000000},
{A6XX_RBBM_CLOCK_CNTL_TEX_FCHE, 0x00000222},
{A6XX_RBBM_CLOCK_DELAY_TEX_FCHE, 0x00000111},
{A6XX_RBBM_CLOCK_HYST_TEX_FCHE, 0x00000000},
{A6XX_RBBM_CLOCK_CNTL_UCHE, 0x22222222},
{A6XX_RBBM_CLOCK_HYST_UCHE, 0x00000004},
{A6XX_RBBM_CLOCK_DELAY_UCHE, 0x00000002},
{A6XX_RBBM_ISDB_CNT, 0x00000182},
{A6XX_RBBM_RAC_THRESHOLD_CNT, 0x00000000},
{A6XX_RBBM_SP_HYST_CNT, 0x00000000},
{A6XX_RBBM_CLOCK_CNTL_GMU_GX, 0x00000222},
{A6XX_RBBM_CLOCK_DELAY_GMU_GX, 0x00000111},
{A6XX_RBBM_CLOCK_HYST_GMU_GX, 0x00000555},
};
static const struct adreno_a6xx_core adreno_gpu_core_a660 = {
{
DEFINE_ADRENO_REV(ADRENO_REV_A660, 6, 6, 0, ANY_ID),
@ -1457,8 +1508,8 @@ static const struct adreno_a6xx_core adreno_gpu_core_a660 = {
.sqefw_name = "a660_sqe.fw",
.gmufw_name = "a660_gmu.bin",
.zap_name = "a660_zap",
.hwcg = NULL,
.hwcg_count = 0,
.hwcg = a660_hwcg_regs,
.hwcg_count = ARRAY_SIZE(a660_hwcg_regs),
.vbif = a650_gbif_regs,
.vbif_count = ARRAY_SIZE(a650_gbif_regs),
.hang_detect_cycles = 0xcfffff,