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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

Browse source 
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (37 commits)
  [NETFILTER]: fix ebtable targets return
  [IP_TUNNEL]: Don't limit the number of tunnels with generic name explicitly.
  [NET]: Restore sanity wrt. print_mac().
  [NEIGH]: Fix race between neighbor lookup and table's hash_rnd update.
  [RTNL]: Validate hardware and broadcast address attribute for RTM_NEWLINK
  tg3: ethtool phys_id default
  [BNX2]: Update version to 1.7.4.
  [BNX2]: Disable parallel detect on an HP blade.
  [BNX2]: More 5706S link down workaround.
  ssb: Fix support for PCI devices behind a SSB->PCI bridge
  zd1211rw: fix sparse warnings
  rtl818x: fix sparse warnings
  ssb: Fix pcicore cardbus mode
  ssb: Make the GPIO API reentrancy safe
  ssb: Fix the GPIO API
  ssb: Fix watchdog access for devices without a chipcommon
  ssb: Fix serial console on new bcm47xx devices
  ath5k: Fix build warnings on some 64-bit platforms.
  WDEV, ath5k, don't return int from bool function
  WDEV: ath5k, fix lock imbalance
  ...
This commit is contained in:
Linus Torvalds 2008-02-23 21:05:06 -08:00
commit bdc0894289
51 changed files with 521 additions and 180 deletions
Download patch file Download diff file Expand all files Collapse all files

3
include/linux/if_ether.h
View file

@ -129,7 +129,8 @@ extern ssize_t sysfs_format_mac(char *buf, const unsigned char *addr, int len);
/*
* Display a 6 byte device address (MAC) in a readable format.
*/
extern __pure char *print_mac(char *buf, const unsigned char *addr);
extern char *print_mac(char *buf, const unsigned char *addr);
#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
#define MAC_BUF_SIZE 18
#define DECLARE_MAC_BUF(var) char var[MAC_BUF_SIZE] __maybe_unused

2
include/linux/netfilter.h
View file

@ -51,7 +51,7 @@ enum nf_inet_hooks {
};
union nf_inet_addr {
u_int32_t all[4];
__u32 all[4];
__be32 ip;
__be32 ip6[4];
struct in_addr in;

2
include/linux/netfilter/Kbuild
View file

@ -30,7 +30,6 @@ header-y += xt_mark.h
header-y += xt_multiport.h
header-y += xt_owner.h
header-y += xt_pkttype.h
header-y += xt_policy.h
header-y += xt_rateest.h
header-y += xt_realm.h
header-y += xt_sctp.h
@ -47,3 +46,4 @@ unifdef-y += nfnetlink.h
unifdef-y += nfnetlink_compat.h
unifdef-y += x_tables.h
unifdef-y += xt_physdev.h
unifdef-y += xt_policy.h

1
include/linux/netfilter/xt_hashlimit.h
View file

@ -61,7 +61,6 @@ struct xt_hashlimit_mtinfo1 {
/* Used internally by the kernel */
struct xt_hashlimit_htable *hinfo __attribute__((aligned(8)));
struct xt_hashlimit_mtinfo1 *master __attribute__((aligned(8)));
};
#endif /*_XT_HASHLIMIT_H*/

12
include/linux/ssb/ssb.h
View file

@ -282,6 +282,13 @@ struct ssb_bus {
struct ssb_boardinfo boardinfo;
/* Contents of the SPROM. */
struct ssb_sprom sprom;
/* If the board has a cardbus slot, this is set to true. */
bool has_cardbus_slot;
#ifdef CONFIG_SSB_EMBEDDED
/* Lock for GPIO register access. */
spinlock_t gpio_lock;
#endif /* EMBEDDED */
/* Internal-only stuff follows. Do not touch. */
struct list_head list;
@ -294,8 +301,13 @@ struct ssb_bus {
/* The initialization-invariants. */
struct ssb_init_invariants {
/* Versioning information about the PCB. */
struct ssb_boardinfo boardinfo;
/* The SPROM information. That's either stored in an
* EEPROM or NVRAM on the board. */
struct ssb_sprom sprom;
/* If the board has a cardbus slot, this is set to true. */
bool has_cardbus_slot;
};
/* Type of function to fetch the invariants. */
typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,

18
include/linux/ssb/ssb_driver_chipcommon.h
View file

@ -51,9 +51,12 @@
#define SSB_CHIPCO_CAP_JTAGM 0x00400000 /* JTAG master present */
#define SSB_CHIPCO_CAP_BROM 0x00800000 /* Internal boot ROM active */
#define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
#define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
#define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
#define SSB_CHIPCO_CORECTL 0x0008
#define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
#define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
#define SSB_CHIPCO_CORECTL_UARTCLKEN 0x00000008 /* UART clock enable (rev >= 21) */
#define SSB_CHIPCO_BIST 0x000C
#define SSB_CHIPCO_OTPS 0x0010 /* OTP status */
#define SSB_CHIPCO_OTPS_PROGFAIL 0x80000000
@ -357,6 +360,11 @@ struct ssb_chipcommon {
u16 fast_pwrup_delay;
};
static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
{
return (cc->dev != NULL);
}
extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
#include <linux/pm.h>
@ -382,11 +390,13 @@ extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc,
u32 ticks);
/* Chipcommon GPIO pin access. */
u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask);
void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value);
u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,

18
include/linux/ssb/ssb_driver_extif.h
View file

@ -171,11 +171,15 @@ extern void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
extern void ssb_extif_timing_init(struct ssb_extif *extif,
unsigned long ns);
extern void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
u32 ticks);
/* Extif GPIO pin access */
u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask);
void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value);
u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value);
#ifdef CONFIG_SSB_SERIAL
extern int ssb_extif_serial_init(struct ssb_extif *extif,
@ -200,5 +204,11 @@ void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
{
}
static inline
void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
u32 ticks)
{
}
#endif /* CONFIG_SSB_DRIVER_EXTIF */
#endif /* LINUX_SSB_EXTIFCORE_H_ */

5
include/linux/ssb/ssb_driver_pci.h
View file

@ -51,6 +51,11 @@
#define SSB_PCICORE_SBTOPCI1_MASK 0xFC000000
#define SSB_PCICORE_SBTOPCI2 0x0108 /* Backplane to PCI translation 2 (sbtopci2) */
#define SSB_PCICORE_SBTOPCI2_MASK 0xC0000000
#define SSB_PCICORE_PCICFG0 0x0400 /* PCI config space 0 (rev >= 8) */
#define SSB_PCICORE_PCICFG1 0x0500 /* PCI config space 1 (rev >= 8) */
#define SSB_PCICORE_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */
#define SSB_PCICORE_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */
#define SSB_PCICORE_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */
/* SBtoPCIx */
#define SSB_PCICORE_SBTOPCI_MEM 0x00000000

18
include/linux/ssb/ssb_embedded.h Normal file
View file

@ -0,0 +1,18 @@
#ifndef LINUX_SSB_EMBEDDED_H_
#define LINUX_SSB_EMBEDDED_H_
#include <linux/types.h>
#include <linux/ssb/ssb.h>
extern int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks);
/* Generic GPIO API */
u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask);
u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value);
u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value);
#endif /* LINUX_SSB_EMBEDDED_H_ */