From c8fc98b764d34c2d56a9195151bc05086b1d86b6 Mon Sep 17 00:00:00 2001 From: Mike Tipton Date: Tue, 19 Nov 2019 14:52:39 -0800 Subject: [PATCH] clk: qcom: gpucc: Fix gpll0 parent names Update the parent names used for gpll0 to match the actual names in the GCC driver. Without this change, clk_set_rate will fail when the determine_rate callback fails to find the associated parent. Change-Id: I0b17fed4e11c30ffb00a2737078bfab5ea1ef523 Signed-off-by: Mike Tipton --- drivers/clk/qcom/gpucc-lahaina.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/gpucc-lahaina.c b/drivers/clk/qcom/gpucc-lahaina.c index 8697ddef07c4..800164c68f1c 100644 --- a/drivers/clk/qcom/gpucc-lahaina.c +++ b/drivers/clk/qcom/gpucc-lahaina.c @@ -109,8 +109,9 @@ static const struct clk_parent_data gpu_cc_parent_data_0_ao[] = { { .fw_name = "bi_tcxo_ao", .name = "bi_tcxo_ao" }, { .hw = &gpu_cc_pll0.clkr.hw }, { .hw = &gpu_cc_pll1.clkr.hw }, - { .fw_name = "gpll0_out_main", .name = "gpll0_out_main" }, - { .fw_name = "gpll0_out_main_div", .name = "gpll0_out_main_div" }, + { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, + { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = + "gcc_gpu_gpll0_div_clk_src" }, { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; @@ -125,8 +126,9 @@ static const struct parent_map gpu_cc_parent_map_1[] = { static const struct clk_parent_data gpu_cc_parent_data_1_ao[] = { { .fw_name = "bi_tcxo_ao", .name = "bi_tcxo_ao" }, { .hw = &gpu_cc_pll1.clkr.hw }, - { .fw_name = "gpll0_out_main", .name = "gpll0_out_main" }, - { .fw_name = "gpll0_out_main_div", .name = "gpll0_out_main_div" }, + { .fw_name = "gcc_gpu_gpll0_clk_src", .name = "gcc_gpu_gpll0_clk_src" }, + { .fw_name = "gcc_gpu_gpll0_div_clk_src", .name = + "gcc_gpu_gpll0_div_clk_src" }, { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, };