mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 18:51:56 -04:00
Merge branch 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr
Pull MIPS updates from Ralf Baechle: - Support for Imgtec's Aptiv family of MIPS cores. - Improved detection of BCM47xx configurations. - Fix hiberation for certain configurations. - Add support for the Chinese Loongson 3 CPU, a MIPS64 R2 core and systems. - Detection and support for the MIPS P5600 core. - A few more random fixes that didn't make 3.14. - Support for the EVA Extended Virtual Addressing - Switch Alchemy to the platform PATA driver - Complete unification of Alchemy support - Allow availability of I/O cache coherency to be runtime detected - Improvments to multiprocessing support for Imgtec platforms - A few microoptimizations - Cleanups of FPU support - Paul Gortmaker's fixes for the init stuff - Support for seccomp * 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr: (165 commits) MIPS: CPC: Use __raw_ memory access functions MIPS: CM: use __raw_ memory access functions MIPS: Fix warning when including smp-ops.h with CONFIG_SMP=n MIPS: Malta: GIC IPIs may be used without MT MIPS: smp-mt: Use common GIC IPI implementation MIPS: smp-cmp: Remove incorrect core number probe MIPS: Fix gigaton of warning building with microMIPS. MIPS: Fix core number detection for MT cores MIPS: MT: core_nvpes function to retrieve VPE count MIPS: Provide empty mips_mt_set_cpuoptions when CONFIG_MIPS_MT=n MIPS: Lasat: Replace del_timer by del_timer_sync MIPS: Malta: Setup PM I/O region on boot MIPS: Loongson: Add a Loongson-3 default config file MIPS: Loongson 3: Add CPU hotplug support MIPS: Loongson 3: Add Loongson-3 SMP support MIPS: Loongson: Add Loongson-3 Kconfig options MIPS: Loongson: Add swiotlb to support All-Memory DMA MIPS: Loongson 3: Add serial port support MIPS: Loongson 3: Add IRQ init and dispatch support MIPS: Loongson 3: Add HT-linked PCI support ...
This commit is contained in:
Linus Torvalds
commit
bdfc7cbdee
181 changed files with 8239 additions and 2527 deletions
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@ -5,12 +5,16 @@
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*
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*
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* Copyright (c) 2013 by Cisco Systems, Inc.
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* All rights reserved.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/edac.h>
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#include <linux/ctype.h>
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#include <asm/octeon/octeon.h>
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#include <asm/octeon/cvmx-lmcx-defs.h>
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@ -20,6 +24,18 @@
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#define OCTEON_MAX_MC 4
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#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
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struct octeon_lmc_pvt {
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unsigned long inject;
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unsigned long error_type;
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unsigned long dimm;
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unsigned long rank;
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unsigned long bank;
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unsigned long row;
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unsigned long col;
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};
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static void octeon_lmc_edac_poll(struct mem_ctl_info *mci)
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{
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union cvmx_lmcx_mem_cfg0 cfg0;
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@ -55,14 +71,31 @@ static void octeon_lmc_edac_poll(struct mem_ctl_info *mci)
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static void octeon_lmc_edac_poll_o2(struct mem_ctl_info *mci)
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{
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struct octeon_lmc_pvt *pvt = mci->pvt_info;
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union cvmx_lmcx_int int_reg;
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bool do_clear = false;
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char msg[64];
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int_reg.u64 = cvmx_read_csr(CVMX_LMCX_INT(mci->mc_idx));
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if (!pvt->inject)
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int_reg.u64 = cvmx_read_csr(CVMX_LMCX_INT(mci->mc_idx));
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else {
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if (pvt->error_type == 1)
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int_reg.s.sec_err = 1;
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if (pvt->error_type == 2)
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int_reg.s.ded_err = 1;
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}
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if (int_reg.s.sec_err || int_reg.s.ded_err) {
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union cvmx_lmcx_fadr fadr;
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fadr.u64 = cvmx_read_csr(CVMX_LMCX_FADR(mci->mc_idx));
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if (likely(!pvt->inject))
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fadr.u64 = cvmx_read_csr(CVMX_LMCX_FADR(mci->mc_idx));
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else {
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fadr.cn61xx.fdimm = pvt->dimm;
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fadr.cn61xx.fbunk = pvt->rank;
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fadr.cn61xx.fbank = pvt->bank;
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fadr.cn61xx.frow = pvt->row;
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fadr.cn61xx.fcol = pvt->col;
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}
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snprintf(msg, sizeof(msg),
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"DIMM %d rank %d bank %d row %d col %d",
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fadr.cn61xx.fdimm, fadr.cn61xx.fbunk,
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@ -82,8 +115,128 @@ static void octeon_lmc_edac_poll_o2(struct mem_ctl_info *mci)
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int_reg.s.ded_err = -1; /* Done, re-arm */
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do_clear = true;
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}
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if (do_clear)
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cvmx_write_csr(CVMX_LMCX_INT(mci->mc_idx), int_reg.u64);
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if (do_clear) {
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if (likely(!pvt->inject))
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cvmx_write_csr(CVMX_LMCX_INT(mci->mc_idx), int_reg.u64);
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else
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pvt->inject = 0;
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}
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}
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/************************ MC SYSFS parts ***********************************/
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/* Only a couple naming differences per template, so very similar */
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#define TEMPLATE_SHOW(reg) \
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static ssize_t octeon_mc_inject_##reg##_show(struct device *dev, \
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struct device_attribute *attr, \
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char *data) \
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{ \
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struct mem_ctl_info *mci = to_mci(dev); \
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struct octeon_lmc_pvt *pvt = mci->pvt_info; \
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return sprintf(data, "%016llu\n", (u64)pvt->reg); \
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}
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#define TEMPLATE_STORE(reg) \
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static ssize_t octeon_mc_inject_##reg##_store(struct device *dev, \
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struct device_attribute *attr, \
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const char *data, size_t count) \
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{ \
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struct mem_ctl_info *mci = to_mci(dev); \
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struct octeon_lmc_pvt *pvt = mci->pvt_info; \
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if (isdigit(*data)) { \
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if (!kstrtoul(data, 0, &pvt->reg)) \
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return count; \
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} \
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return 0; \
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}
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TEMPLATE_SHOW(inject);
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TEMPLATE_STORE(inject);
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TEMPLATE_SHOW(dimm);
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TEMPLATE_STORE(dimm);
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TEMPLATE_SHOW(bank);
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TEMPLATE_STORE(bank);
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TEMPLATE_SHOW(rank);
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TEMPLATE_STORE(rank);
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TEMPLATE_SHOW(row);
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TEMPLATE_STORE(row);
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TEMPLATE_SHOW(col);
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TEMPLATE_STORE(col);
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static ssize_t octeon_mc_inject_error_type_store(struct device *dev,
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struct device_attribute *attr,
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const char *data,
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size_t count)
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{
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struct mem_ctl_info *mci = to_mci(dev);
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struct octeon_lmc_pvt *pvt = mci->pvt_info;
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if (!strncmp(data, "single", 6))
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pvt->error_type = 1;
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else if (!strncmp(data, "double", 6))
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pvt->error_type = 2;
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return count;
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}
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static ssize_t octeon_mc_inject_error_type_show(struct device *dev,
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struct device_attribute *attr,
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char *data)
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{
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struct mem_ctl_info *mci = to_mci(dev);
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struct octeon_lmc_pvt *pvt = mci->pvt_info;
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if (pvt->error_type == 1)
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return sprintf(data, "single");
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else if (pvt->error_type == 2)
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return sprintf(data, "double");
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return 0;
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}
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static DEVICE_ATTR(inject, S_IRUGO | S_IWUSR,
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octeon_mc_inject_inject_show, octeon_mc_inject_inject_store);
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static DEVICE_ATTR(error_type, S_IRUGO | S_IWUSR,
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octeon_mc_inject_error_type_show, octeon_mc_inject_error_type_store);
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static DEVICE_ATTR(dimm, S_IRUGO | S_IWUSR,
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octeon_mc_inject_dimm_show, octeon_mc_inject_dimm_store);
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static DEVICE_ATTR(rank, S_IRUGO | S_IWUSR,
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octeon_mc_inject_rank_show, octeon_mc_inject_rank_store);
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static DEVICE_ATTR(bank, S_IRUGO | S_IWUSR,
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octeon_mc_inject_bank_show, octeon_mc_inject_bank_store);
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static DEVICE_ATTR(row, S_IRUGO | S_IWUSR,
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octeon_mc_inject_row_show, octeon_mc_inject_row_store);
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static DEVICE_ATTR(col, S_IRUGO | S_IWUSR,
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octeon_mc_inject_col_show, octeon_mc_inject_col_store);
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static int octeon_set_mc_sysfs_attributes(struct mem_ctl_info *mci)
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{
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int rc;
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rc = device_create_file(&mci->dev, &dev_attr_inject);
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if (rc < 0)
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return rc;
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rc = device_create_file(&mci->dev, &dev_attr_error_type);
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if (rc < 0)
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return rc;
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rc = device_create_file(&mci->dev, &dev_attr_dimm);
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if (rc < 0)
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return rc;
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rc = device_create_file(&mci->dev, &dev_attr_rank);
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if (rc < 0)
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return rc;
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rc = device_create_file(&mci->dev, &dev_attr_bank);
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if (rc < 0)
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return rc;
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rc = device_create_file(&mci->dev, &dev_attr_row);
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if (rc < 0)
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return rc;
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rc = device_create_file(&mci->dev, &dev_attr_col);
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if (rc < 0)
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return rc;
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return 0;
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}
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static int octeon_lmc_edac_probe(struct platform_device *pdev)
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@ -92,6 +245,8 @@ static int octeon_lmc_edac_probe(struct platform_device *pdev)
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struct edac_mc_layer layers[1];
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int mc = pdev->id;
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opstate_init();
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layers[0].type = EDAC_MC_LAYER_CHANNEL;
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layers[0].size = 1;
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layers[0].is_virt_csrow = false;
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@ -105,7 +260,7 @@ static int octeon_lmc_edac_probe(struct platform_device *pdev)
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return 0;
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}
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mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, 0);
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mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, sizeof(struct octeon_lmc_pvt));
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if (!mci)
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return -ENXIO;
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@ -122,6 +277,12 @@ static int octeon_lmc_edac_probe(struct platform_device *pdev)
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return -ENXIO;
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}
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if (octeon_set_mc_sysfs_attributes(mci)) {
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dev_err(&pdev->dev, "octeon_set_mc_sysfs_attributes() failed\n");
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return -ENXIO;
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}
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cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc));
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cfg0.s.intr_ded_ena = 0; /* We poll */
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cfg0.s.intr_sec_ena = 0;
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@ -137,7 +298,7 @@ static int octeon_lmc_edac_probe(struct platform_device *pdev)
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return 0;
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}
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mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, 0);
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mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, sizeof(struct octeon_lmc_pvt));
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if (!mci)
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return -ENXIO;
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@ -154,6 +315,12 @@ static int octeon_lmc_edac_probe(struct platform_device *pdev)
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return -ENXIO;
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}
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if (octeon_set_mc_sysfs_attributes(mci)) {
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dev_err(&pdev->dev, "octeon_set_mc_sysfs_attributes() failed\n");
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return -ENXIO;
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}
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en.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc));
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en.s.intr_ded_ena = 0; /* We poll */
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en.s.intr_sec_ena = 0;
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