diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 60a66a41856e..262f41fd0d44 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -434,6 +434,45 @@ static const struct clk_rpmh_desc clk_rpmh_sm8150 = {
 	.num_clks = ARRAY_SIZE(sm8150_rpmh_clocks),
 };
 
+DEFINE_CLK_RPMH_ARC(lahaina, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 2);
+DEFINE_CLK_RPMH_VRM(lahaina, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 2);
+DEFINE_CLK_RPMH_VRM(lahaina, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 2);
+DEFINE_CLK_RPMH_VRM(lahaina, rf_clk1, rf_clk1_ao, "rfclka1", 1);
+DEFINE_CLK_RPMH_VRM(lahaina, rf_clk2, rf_clk2_ao, "rfclka2", 1);
+DEFINE_CLK_RPMH_VRM(lahaina, rf_clk3, rf_clk3_ao, "rfclka3", 1);
+DEFINE_CLK_RPMH_VRM(lahaina, rf_clk4, rf_clk4_ao, "rfclka4", 1);
+DEFINE_CLK_RPMH_VRM(lahaina, rf_clk5, rf_clk5_ao, "rfclka5", 1);
+DEFINE_CLK_RPMH_BCM(lahaina, ipa, "IP0");
+DEFINE_CLK_RPMH_BCM(lahaina, pka, "PKA0");
+DEFINE_CLK_RPMH_BCM(lahaina, hwkm, "HK0");
+
+static struct clk_hw *lahaina_rpmh_clocks[] = {
+	[RPMH_CXO_CLK]		= &lahaina_bi_tcxo.hw,
+	[RPMH_CXO_CLK_A]	= &lahaina_bi_tcxo_ao.hw,
+	[RPMH_LN_BB_CLK1]	= &lahaina_ln_bb_clk1.hw,
+	[RPMH_LN_BB_CLK1_A]	= &lahaina_ln_bb_clk1_ao.hw,
+	[RPMH_LN_BB_CLK2]	= &lahaina_ln_bb_clk2.hw,
+	[RPMH_LN_BB_CLK2_A]	= &lahaina_ln_bb_clk2_ao.hw,
+	[RPMH_RF_CLK1]		= &lahaina_rf_clk1.hw,
+	[RPMH_RF_CLK1_A]	= &lahaina_rf_clk1_ao.hw,
+	[RPMH_RF_CLK2]		= &lahaina_rf_clk2.hw,
+	[RPMH_RF_CLK2_A]	= &lahaina_rf_clk2_ao.hw,
+	[RPMH_RF_CLK3]		= &lahaina_rf_clk3.hw,
+	[RPMH_RF_CLK3_A]	= &lahaina_rf_clk3_ao.hw,
+	[RPMH_RF_CLK4]		= &lahaina_rf_clk4.hw,
+	[RPMH_RF_CLK4_A]	= &lahaina_rf_clk4_ao.hw,
+	[RPMH_RF_CLK5]		= &lahaina_rf_clk5.hw,
+	[RPMH_RF_CLK5_A]	= &lahaina_rf_clk5_ao.hw,
+	[RPMH_IPA_CLK]		= &lahaina_ipa.hw,
+	[RPMH_PKA_CLK]		= &lahaina_pka.hw,
+	[RPMH_HWKM_CLK]		= &lahaina_hwkm.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_lahaina = {
+	.clks = lahaina_rpmh_clocks,
+	.num_clks = ARRAY_SIZE(lahaina_rpmh_clocks),
+};
+
 static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
 					 void *data)
 {
@@ -528,6 +567,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
 	{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
 	{ .compatible = "qcom,kona-rpmh-clk", .data = &clk_rpmh_kona},
 	{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
+	{ .compatible = "qcom,lahaina-rpmh-clk", .data = &clk_rpmh_lahaina},
 	{ }
 };
 MODULE_DEVICE_TABLE(of, clk_rpmh_match_table);
diff --git a/include/dt-bindings/clock/qcom,rpmh.h b/include/dt-bindings/clock/qcom,rpmh.h
index 1f135ea393f5..09de0bbe678a 100644
--- a/include/dt-bindings/clock/qcom,rpmh.h
+++ b/include/dt-bindings/clock/qcom,rpmh.h
@@ -20,10 +20,16 @@
 #define RPMH_RF_CLK2_A				11
 #define RPMH_RF_CLK3				12
 #define RPMH_RF_CLK3_A				13
-#define RPMH_RF_CLKD3				14
-#define RPMH_RF_CLKD3_A				15
-#define RPMH_RF_CLKD4				16
-#define RPMH_RF_CLKD4_A				17
-#define RPMH_IPA_CLK				18
+#define RPMH_RF_CLK4				14
+#define RPMH_RF_CLK4_A				15
+#define RPMH_RF_CLK5				16
+#define RPMH_RF_CLK5_A				17
+#define RPMH_RF_CLKD3				18
+#define RPMH_RF_CLKD3_A				19
+#define RPMH_RF_CLKD4				20
+#define RPMH_RF_CLKD4_A				21
+#define RPMH_IPA_CLK				22
+#define RPMH_PKA_CLK				23
+#define RPMH_HWKM_CLK				24
 
 #endif