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Merge "soc: qcom: smd-rpm: Support new clocks resources"

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This commit is contained in:
qctecmdr 2020-06-08 04:30:43 -07:00 • committed by Gerrit - the friendly Code Review server
commit bf2d916a9f
2 changed files with 116 additions and 90 deletions
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202
include/dt-bindings/clock/qcom,rpmcc.h
View file

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2015 Linaro Limited
* Copyright 2015-2020 Linaro Limited
*/
#ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H
@ -39,95 +39,117 @@
#define RPM_XO_A2 29
/* SMD RPM clocks */
#define RPM_SMD_XO_CLK_SRC 0
#define RPM_SMD_XO_CLK_SRC 0
#define RPM_SMD_XO_A_CLK_SRC 1
#define RPM_SMD_PCNOC_CLK 2
#define RPM_SMD_PCNOC_A_CLK 3
#define RPM_SMD_SNOC_CLK 4
#define RPM_SMD_SNOC_A_CLK 5
#define RPM_SMD_BIMC_CLK 6
#define RPM_SMD_BIMC_A_CLK 7
#define RPM_SMD_QDSS_CLK 8
#define RPM_SMD_QDSS_A_CLK 9
#define RPM_SMD_BB_CLK1 10
#define RPM_SMD_BB_CLK1_A 11
#define RPM_SMD_BB_CLK2 12
#define RPM_SMD_BB_CLK2_A 13
#define RPM_SMD_RF_CLK1 14
#define RPM_SMD_RF_CLK1_A 15
#define RPM_SMD_RF_CLK2 16
#define RPM_SMD_RF_CLK2_A 17
#define RPM_SMD_BB_CLK1_PIN 18
#define RPM_SMD_BB_CLK1_A_PIN 19
#define RPM_SMD_BB_CLK2_PIN 20
#define RPM_SMD_BB_CLK2_A_PIN 21
#define RPM_SMD_RF_CLK1_PIN 22
#define RPM_SMD_RF_CLK1_A_PIN 23
#define RPM_SMD_RF_CLK2_PIN 24
#define RPM_SMD_RF_CLK2_A_PIN 25
#define RPM_SMD_PNOC_CLK 26
#define RPM_SMD_PNOC_A_CLK 27
#define RPM_SMD_CNOC_CLK 28
#define RPM_SMD_CNOC_A_CLK 29
#define RPM_SMD_MMSSNOC_AHB_CLK 30
#define RPM_SMD_MMSSNOC_AHB_A_CLK 31
#define RPM_SMD_GFX3D_CLK_SRC 32
#define RPM_SMD_GFX3D_A_CLK_SRC 33
#define RPM_SMD_OCMEMGX_CLK 34
#define RPM_SMD_OCMEMGX_A_CLK 35
#define RPM_SMD_CXO_D0 36
#define RPM_SMD_CXO_D0_A 37
#define RPM_SMD_CXO_D1 38
#define RPM_SMD_CXO_D1_A 39
#define RPM_SMD_CXO_A0 40
#define RPM_SMD_CXO_A0_A 41
#define RPM_SMD_CXO_A1 42
#define RPM_SMD_CXO_A1_A 43
#define RPM_SMD_CXO_A2 44
#define RPM_SMD_CXO_A2_A 45
#define RPM_SMD_DIV_CLK1 46
#define RPM_SMD_DIV_A_CLK1 47
#define RPM_SMD_DIV_CLK2 48
#define RPM_SMD_DIV_A_CLK2 49
#define RPM_SMD_DIFF_CLK 50
#define RPM_SMD_DIFF_A_CLK 51
#define RPM_SMD_CXO_D0_PIN 52
#define RPM_SMD_CXO_D0_A_PIN 53
#define RPM_SMD_CXO_D1_PIN 54
#define RPM_SMD_CXO_D1_A_PIN 55
#define RPM_SMD_CXO_A0_PIN 56
#define RPM_SMD_CXO_A0_A_PIN 57
#define RPM_SMD_CXO_A1_PIN 58
#define RPM_SMD_CXO_A1_A_PIN 59
#define RPM_SMD_CXO_A2_PIN 60
#define RPM_SMD_CXO_A2_A_PIN 61
#define RPM_SMD_AGGR1_NOC_CLK 62
#define RPM_SMD_AGGR1_NOC_A_CLK 63
#define RPM_SMD_AGGR2_NOC_CLK 64
#define RPM_SMD_AGGR2_NOC_A_CLK 65
#define RPM_SMD_MMAXI_CLK 66
#define RPM_SMD_MMAXI_A_CLK 67
#define RPM_SMD_IPA_CLK 68
#define RPM_SMD_IPA_A_CLK 69
#define RPM_SMD_CE1_CLK 70
#define RPM_SMD_CE1_A_CLK 71
#define RPM_SMD_DIV_CLK3 72
#define RPM_SMD_DIV_A_CLK3 73
#define RPM_SMD_LN_BB_CLK 74
#define RPM_SMD_LN_BB_A_CLK 75
#define RPM_SMD_BIMC_GPU_CLK 76
#define RPM_SMD_BIMC_GPU_A_CLK 77
#define RPM_SMD_QPIC_CLK 78
#define RPM_SMD_QPIC_CLK_A 79
#define RPM_SMD_LN_BB_CLK1 80
#define RPM_SMD_LN_BB_CLK1_A 81
#define RPM_SMD_LN_BB_CLK2 82
#define RPM_SMD_LN_BB_CLK2_A 83
#define RPM_SMD_LN_BB_CLK3_PIN 84
#define RPM_SMD_LN_BB_CLK3_A_PIN 85
#define RPM_SMD_RF_CLK3 86
#define RPM_SMD_RF_CLK3_A 87
#define RPM_SMD_RF_CLK3_PIN 88
#define RPM_SMD_RF_CLK3_A_PIN 89
#define RPM_SMD_PCNOC_CLK 2
#define RPM_SMD_PCNOC_A_CLK 3
#define RPM_SMD_SNOC_CLK 4
#define RPM_SMD_SNOC_A_CLK 5
#define RPM_SMD_BIMC_CLK 6
#define RPM_SMD_BIMC_A_CLK 7
#define RPM_SMD_QDSS_CLK 8
#define RPM_SMD_QDSS_A_CLK 9
#define RPM_SMD_IPA_CLK 10
#define RPM_SMD_IPA_A_CLK 11
#define RPM_SMD_QUP_CLK 12
#define RPM_SMD_QUP_A_CLK 13
#define RPM_SMD_MMRT_CLK 14
#define RPM_SMD_MMRT_A_CLK 15
#define RPM_SMD_MMNRT_CLK 16
#define RPM_SMD_MMNRT_A_CLK 17
#define RPM_SMD_SNOC_PERIPH_CLK 18
#define RPM_SMD_SNOC_PERIPH_A_CLK 19
#define RPM_SMD_SNOC_LPASS_CLK 20
#define RPM_SMD_SNOC_LPASS_A_CLK 21
#define RPM_SMD_BB_CLK1 22
#define RPM_SMD_BB_CLK1_A 23
#define RPM_SMD_BB_CLK2 24
#define RPM_SMD_BB_CLK2_A 25
#define RPM_SMD_RF_CLK1 26
#define RPM_SMD_RF_CLK1_A 27
#define RPM_SMD_RF_CLK2 28
#define RPM_SMD_RF_CLK2_A 29
#define RPM_SMD_BB_CLK1_PIN 30
#define RPM_SMD_BB_CLK1_A_PIN 31
#define RPM_SMD_BB_CLK2_PIN 32
#define RPM_SMD_BB_CLK2_A_PIN 33
#define RPM_SMD_RF_CLK1_PIN 34
#define RPM_SMD_RF_CLK1_A_PIN 35
#define RPM_SMD_RF_CLK2_PIN 36
#define RPM_SMD_RF_CLK2_A_PIN 37
#define RPM_SMD_PNOC_CLK 38
#define RPM_SMD_PNOC_A_CLK 39
#define RPM_SMD_CNOC_CLK 40
#define RPM_SMD_CNOC_A_CLK 41
#define RPM_SMD_MMSSNOC_AHB_CLK 42
#define RPM_SMD_MMSSNOC_AHB_A_CLK 43
#define RPM_SMD_GFX3D_CLK_SRC 44
#define RPM_SMD_GFX3D_A_CLK_SRC 45
#define RPM_SMD_OCMEMGX_CLK 46
#define RPM_SMD_OCMEMGX_A_CLK 47
#define RPM_SMD_CXO_D0 48
#define RPM_SMD_CXO_D0_A 49
#define RPM_SMD_CXO_D1 50
#define RPM_SMD_CXO_D1_A 51
#define RPM_SMD_CXO_A0 52
#define RPM_SMD_CXO_A0_A 53
#define RPM_SMD_CXO_A1 54
#define RPM_SMD_CXO_A1_A 55
#define RPM_SMD_CXO_A2 56
#define RPM_SMD_CXO_A2_A 57
#define RPM_SMD_DIV_CLK1 58
#define RPM_SMD_DIV_A_CLK1 59
#define RPM_SMD_DIV_CLK2 60
#define RPM_SMD_DIV_A_CLK2 61
#define RPM_SMD_DIV_CLK3 62
#define RPM_SMD_DIV_A_CLK3 63
#define RPM_SMD_DIFF_CLK 64
#define RPM_SMD_DIFF_A_CLK 65
#define RPM_SMD_CXO_D0_PIN 66
#define RPM_SMD_CXO_D0_A_PIN 67
#define RPM_SMD_CXO_D1_PIN 68
#define RPM_SMD_CXO_D1_A_PIN 69
#define RPM_SMD_CXO_A0_PIN 70
#define RPM_SMD_CXO_A0_A_PIN 71
#define RPM_SMD_CXO_A1_PIN 72
#define RPM_SMD_CXO_A1_A_PIN 73
#define RPM_SMD_CXO_A2_PIN 74
#define RPM_SMD_CXO_A2_A_PIN 75
#define RPM_SMD_QPIC_CLK 76
#define RPM_SMD_QPIC_A_CLK 77
#define RPM_SMD_CE1_CLK 78
#define RPM_SMD_CE1_A_CLK 79
#define RPM_SMD_HWKM_CLK 80
#define RPM_SMD_HWKM_A_CLK 81
#define RPM_SMD_PKA_CLK 82
#define RPM_SMD_PKA_A_CLK 83
#define RPM_SMD_BIMC_GPU_CLK 84
#define RPM_SMD_BIMC_GPU_A_CLK 85
#define RPM_SMD_LN_BB_CLK 86
#define RPM_SMD_LN_BB_CLK_A 87
#define RPM_SMD_LN_BB_CLK_PIN 88
#define RPM_SMD_LN_BB_CLK_A_PIN 89
#define RPM_SMD_RF_CLK3 90
#define RPM_SMD_RF_CLK3_A 91
#define RPM_SMD_RF_CLK3_PIN 92
#define RPM_SMD_RF_CLK3_A_PIN 93
#define RPM_SMD_LN_BB_CLK1 94
#define RPM_SMD_LN_BB_CLK1_A 95
#define RPM_SMD_LN_BB_CLK2 96
#define RPM_SMD_LN_BB_CLK2_A 97
#define RPM_SMD_LN_BB_CLK3 98
#define RPM_SMD_LN_BB_CLK3_A 99
#define RPM_SMD_LN_BB_CLK3_PIN 100
#define RPM_SMD_LN_BB_CLK3_A_PIN 101
#define RPM_SMD_MMAXI_CLK 102
#define RPM_SMD_MMAXI_A_CLK 103
#define RPM_SMD_AGGR1_NOC_CLK 104
#define RPM_SMD_AGGR1_NOC_A_CLK 105
#define RPM_SMD_AGGR2_NOC_CLK 106
#define RPM_SMD_AGGR2_NOC_A_CLK 107
#define RPM_SMD_RF_CLK5 108
#define RPM_SMD_RF_CLK5_A 109
#define RPM_SMD_RF_CLK5_PIN 110
#define RPM_SMD_RF_CLK5_A_PIN 111
#endif

4
include/linux/soc/qcom/smd-rpm.h
View file

@ -32,6 +32,10 @@ struct qcom_smd_rpm;
#define QCOM_SMD_RPM_IPA_CLK 0x617069
#define QCOM_SMD_RPM_CE_CLK 0x6563
#define QCOM_SMD_RPM_AGGR_CLK 0x72676761
#define QCOM_SMD_RPM_QUP_CLK 0x00707571
#define QCOM_SMD_RPM_MMXI_CLK 0x69786D6D
#define QCOM_SMD_RPM_HWKM_CLK 0x6D6B7768
#define QCOM_SMD_RPM_PKA_CLK 0x616B70
int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm,
int state,