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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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ARM: tegra: core SoC enhancements for 3.12
This branch includes a number of enhancements to core SoC support for Tegra devices. The major new features are: * Adds a new CPU-power-gated cpuidle state for Tegra114. * Adds initial system suspend support for Tegra114, initially supporting just CPU-power-gating during suspend. * Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode both gates CPU power, and places the DRAM into self-refresh mode. * A new DT-driven PCIe driver to Tegra20/30. The driver is also moved from arch/arm/mach-tegra/ to drivers/pci/host/. The PCIe driver work depends on the following tag from Thomas Petazzoni: git://git.infradead.org/linux-mvebu.git mis-3.12.2 ... which is merged into the middle of this pull request. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJSDlwwAAoJEMzrak5tbycxR68QAJZ/Izc9Izj0JH8hmCEvMNfi ub1DQfWAy3oXk0ttkk+BMvuyD8JTvBr8LSK8GqjZs//rFGlW81A4NHTvCwoKZjKe hgrRgI2B1wj3Um1sp8le9D0klKrTcfmpXrOxH8ALgz0BIpMge8AGZHkV0SrfQa1z bKiISFVAw12WJCVrQ2nbzpZGU51lbyJ/+RghttM1a8LuS2P03CZgt2kqiytk3UVK uiGEy3sCkjXLFO3EsUvM6ha623S6BumCAYjNfgDowTVKaoEe1r2TD4bFeU6lGcXJ mlVTv0Kywazf4Q2gKzkbDz8UQMArW4hok2iILHzz+sf/Rn0hie5XVqhFlbBlcae8 vyWsHmqvmE9BJAK2G2RLs9cJCTzEpEyAjUWfE3sIIa3ztSguT5+PHndDLR/d76aS j8L3FYReICZ1NuNw1JSQPFs9g2EWJbNRiy+8o9O2elsJMpLDBj/FcV6TVpudbBTI z7hvN+XSVYUaCVD4e8ma9YoC3VGseiAZvd+Y8hPd2MFBECVPNpy2bOacieU6Bgxh zjSBXZ/URxN3rTkv9+F3BLWAOfVmJYN0rKV9YfM/rqpWjc9iQx30m1fRZDnXWhvd ps8eFIYsKqc6v9AAugl/RexFy4Laav9eREjb0k2LA8ClLhK/qLLuiisVmKWS/grh lX9tzPEG2nZcjxSYaEjz =ve9i -----END PGP SIGNATURE----- Merge tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc From: Stephen Warren: ARM: tegra: core SoC enhancements for 3.12 This branch includes a number of enhancements to core SoC support for Tegra devices. The major new features are: * Adds a new CPU-power-gated cpuidle state for Tegra114. * Adds initial system suspend support for Tegra114, initially supporting just CPU-power-gating during suspend. * Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode both gates CPU power, and places the DRAM into self-refresh mode. * A new DT-driven PCIe driver to Tegra20/30. The driver is also moved from arch/arm/mach-tegra/ to drivers/pci/host/. The PCIe driver work depends on the following tag from Thomas Petazzoni: git://git.infradead.org/linux-mvebu.git mis-3.12.2 ... which is merged into the middle of this pull request. * tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (33 commits) ARM: tegra: disable LP2 cpuidle state if PCIe is enabled MAINTAINERS: Add myself as Tegra PCIe maintainer PCI: tegra: set up PADS_REFCLK_CFG1 PCI: tegra: Add Tegra 30 PCIe support PCI: tegra: Move PCIe driver to drivers/pci/host PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms ARM: tegra: add LP1 suspend support for Tegra114 ARM: tegra: add LP1 suspend support for Tegra20 ARM: tegra: add LP1 suspend support for Tegra30 ARM: tegra: add common LP1 suspend support clk: tegra114: add LP1 suspend/resume support ARM: tegra: config the polarity of the request of sys clock ARM: tegra: add common resume handling code for LP1 resuming ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci of: pci: add registry of MSI chips PCI: Introduce new MSI chip infrastructure PCI: remove ARCH_SUPPORTS_MSI kconfig option PCI: use weak functions for MSI arch-specific functions ARM: tegra: unify Tegra's Kconfig a bit more ARM: tegra: remove the limitation that Tegra114 can't support suspend ... Signed-off-by: Kevin Hilman <[email protected]>
This commit is contained in:
commit
bfa664f21b
60 changed files with 3521 additions and 1150 deletions
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@ -1,13 +1,9 @@
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#
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# PCI configuration
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#
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config ARCH_SUPPORTS_MSI
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bool
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config PCI_MSI
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bool "Message Signaled Interrupts (MSI and MSI-X)"
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depends on PCI
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depends on ARCH_SUPPORTS_MSI
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help
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This allows device drivers to enable MSI (Message Signaled
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Interrupts). Message Signaled Interrupts enable a device to
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@ -14,4 +14,8 @@ config PCI_EXYNOS
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select PCIEPORTBUS
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select PCIE_DW
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config PCI_TEGRA
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bool "NVIDIA Tegra PCIe controller"
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depends on ARCH_TEGRA
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endmenu
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@ -1,2 +1,3 @@
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obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
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obj-$(CONFIG_PCIE_DW) += pcie-designware.o
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obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
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1702
drivers/pci/host/pci-tegra.c
Normal file
1702
drivers/pci/host/pci-tegra.c
Normal file
File diff suppressed because it is too large
Load diff
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@ -30,20 +30,60 @@ static int pci_msi_enable = 1;
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/* Arch hooks */
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#ifndef arch_msi_check_device
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int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
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#if defined(CONFIG_GENERIC_HARDIRQS)
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int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
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{
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struct msi_chip *chip = dev->bus->msi;
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int err;
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if (!chip || !chip->setup_irq)
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return -EINVAL;
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err = chip->setup_irq(chip, dev, desc);
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if (err < 0)
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return err;
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irq_set_chip_data(desc->irq, chip);
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return 0;
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}
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void __weak arch_teardown_msi_irq(unsigned int irq)
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{
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struct msi_chip *chip = irq_get_chip_data(irq);
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if (!chip || !chip->teardown_irq)
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return;
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chip->teardown_irq(chip, irq);
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}
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int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
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{
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struct msi_chip *chip = dev->bus->msi;
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if (!chip || !chip->check_device)
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return 0;
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return chip->check_device(chip, dev, nvec, type);
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}
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#else
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int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
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{
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return -ENOSYS;
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}
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void __weak arch_teardown_msi_irq(unsigned int irq)
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{
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}
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int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
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{
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return 0;
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}
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#endif
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#endif /* CONFIG_GENERIC_HARDIRQS */
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#ifndef arch_setup_msi_irqs
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# define arch_setup_msi_irqs default_setup_msi_irqs
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# define HAVE_DEFAULT_MSI_SETUP_IRQS
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#endif
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#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
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int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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{
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struct msi_desc *entry;
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int ret;
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@ -65,14 +105,11 @@ int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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return 0;
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}
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#endif
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#ifndef arch_teardown_msi_irqs
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# define arch_teardown_msi_irqs default_teardown_msi_irqs
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# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
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#endif
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#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
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/*
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* We have a default implementation available as a separate non-weak
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* function, as it is used by the Xen x86 PCI code
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*/
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void default_teardown_msi_irqs(struct pci_dev *dev)
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{
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struct msi_desc *entry;
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@ -89,14 +126,12 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
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arch_teardown_msi_irq(entry->irq + i);
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}
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}
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#endif
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#ifndef arch_restore_msi_irqs
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# define arch_restore_msi_irqs default_restore_msi_irqs
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# define HAVE_DEFAULT_MSI_RESTORE_IRQS
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#endif
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void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
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{
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return default_teardown_msi_irqs(dev);
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}
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#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
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void default_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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struct msi_desc *entry;
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@ -114,7 +149,11 @@ void default_restore_msi_irqs(struct pci_dev *dev, int irq)
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if (entry)
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write_msi_msg(irq, &entry->msg);
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}
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#endif
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void __weak arch_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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return default_restore_msi_irqs(dev, irq);
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}
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static void msi_set_enable(struct pci_dev *dev, int enable)
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{
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@ -666,6 +666,7 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
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child->parent = parent;
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child->ops = parent->ops;
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child->msi = parent->msi;
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child->sysdata = parent->sysdata;
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child->bus_flags = parent->bus_flags;
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