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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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This is the 5.4.217 stable release
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmM/0m4ACgkQONu9yGCS aT4WDQ/+KW69exv+g+Yz7p095M1hqjqzyQS4tLBFFkdKWXvUPF2HVCFYn9tOZVFe qu8l8tIcbvxAB9ec4YaQvRMYKsnJhJzKQY88+C9Div72DDAN2699ICFUiwQngv7B vmIe1oPzxGnDD4cRtaDhH9p0CDqopS1h3x1ctMrU2wPKQQM+AinW56ug0cCvjdmK kcIDvG7a8aXc9xOKaqo4naHkk9Qu+x02w9lql25AZDADp+ZHomh7R/OjHoYnRwaR 1g3Q+yy8iAaWCBGAiyyFcP+kPeSHBjcu2rWoGdw1LimOB6loxX0JRkHF2tnSVSJI DQcCkvnFHJQDpOQHG2O9mqvtpsMdgdX8XvJCJFnlnzUFEAPLxxQ6zARhVaYBR8X2 kC+D/DG7Wk7yhKtBtdXug7fSxwTdPMj02zBvhElri7KUUueoALa2BYF8TOkXLhZa R8PL7pMbMaUDfvkLw580PsAbDiVy4XzWKRiK2ZGUe5CjqT7KXxgmzCdxXYGzQXF9 FDzZD7++CAQ1qWxEM+WugSFGiDNYqDHdTQmdbb+mci9JdpYhUA0C2ZPwWGF6uKBV T84zSwAegXrNL//1ugxRxM/5cv1qAWhLAFzbihjTd27gtRyXFejLpPJTF27VDYN+ B4JIf2D+wHSFszV1SDBt08D40tnPnYTRQ56dMt9M2Fnaq9H8pwo= =3udV -----END PGP SIGNATURE----- Merge 5.4.217 into android11-5.4-lts Changes in 5.4.217 Revert "x86/speculation: Add RSB VM Exit protections" Revert "x86/cpu: Add a steppings field to struct x86_cpu_id" x86/devicetable: Move x86 specific macro out of generic code x86/cpu: Add consistent CPU match macros x86/cpu: Add a steppings field to struct x86_cpu_id x86/kvm/vmx: Make noinstr clean x86/cpufeatures: Move RETPOLINE flags to word 11 x86/bugs: Report AMD retbleed vulnerability x86/bugs: Add AMD retbleed= boot parameter x86/bugs: Keep a per-CPU IA32_SPEC_CTRL value x86/entry: Remove skip_r11rcx x86/entry: Add kernel IBRS implementation x86/bugs: Optimize SPEC_CTRL MSR writes x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS x86/bugs: Split spectre_v2_select_mitigation() and spectre_v2_user_select_mitigation() x86/bugs: Report Intel retbleed vulnerability intel_idle: Disable IBRS during long idle x86/speculation: Change FILL_RETURN_BUFFER to work with objtool x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n x86/speculation: Fix firmware entry SPEC_CTRL handling x86/speculation: Fix SPEC_CTRL write on SMT state change x86/speculation: Use cached host SPEC_CTRL value for guest entry/exit x86/speculation: Remove x86_spec_ctrl_mask KVM/VMX: Use TEST %REG,%REG instead of CMP $0,%REG in vmenter.S KVM/nVMX: Use __vmx_vcpu_run in nested_vmx_check_vmentry_hw KVM: VMX: Flatten __vmx_vcpu_run() KVM: VMX: Convert launched argument to flags KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS KVM: VMX: Fix IBRS handling after vmexit x86/speculation: Fill RSB on vmexit for IBRS x86/common: Stamp out the stepping madness x86/cpu/amd: Enumerate BTC_NO x86/bugs: Add Cannon lake to RETBleed affected CPU list x86/speculation: Disable RRSBA behavior x86/speculation: Use DECLARE_PER_CPU for x86_spec_ctrl_current x86/bugs: Warn when "ibrs" mitigation is selected on Enhanced IBRS parts x86/speculation: Add RSB VM Exit protections xfs: fix misuse of the XFS_ATTR_INCOMPLETE flag xfs: introduce XFS_MAX_FILEOFF xfs: truncate should remove all blocks, not just to the end of the page cache xfs: fix s_maxbytes computation on 32-bit kernels xfs: fix IOCB_NOWAIT handling in xfs_file_dio_aio_read xfs: refactor remote attr value buffer invalidation xfs: fix memory corruption during remote attr value buffer invalidation xfs: move incore structures out of xfs_da_format.h xfs: streamline xfs_attr3_leaf_inactive xfs: fix uninitialized variable in xfs_attr3_leaf_inactive xfs: remove unused variable 'done' Revert "drm/amdgpu: use dirty framebuffer helper" Makefile.extrawarn: Move -Wcast-function-type-strict to W=1 docs: update mediator information in CoC docs Linux 5.4.217 Signed-off-by: Greg Kroah-Hartman <[email protected]> Change-Id: I105690ca9b48507da0590cb62dd60db2a95698e6
This commit is contained in:
commit
c01b171cd9
51 changed files with 1055 additions and 557 deletions
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@ -46,11 +46,13 @@
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#include <linux/tick.h>
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#include <trace/events/power.h>
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#include <linux/sched.h>
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#include <linux/sched/smt.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/moduleparam.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/nospec-branch.h>
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#include <asm/mwait.h>
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#include <asm/msr.h>
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@ -97,6 +99,12 @@ static struct cpuidle_state *cpuidle_state_table;
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*/
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#define CPUIDLE_FLAG_TLB_FLUSHED 0x10000
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/*
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* Disable IBRS across idle (when KERNEL_IBRS), is exclusive vs IRQ_ENABLE
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* above.
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*/
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#define CPUIDLE_FLAG_IBRS BIT(16)
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/*
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* MWAIT takes an 8-bit "hint" in EAX "suggesting"
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* the C-state (top nibble) and sub-state (bottom nibble)
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@ -107,6 +115,24 @@ static struct cpuidle_state *cpuidle_state_table;
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#define flg2MWAIT(flags) (((flags) >> 24) & 0xFF)
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#define MWAIT2flg(eax) ((eax & 0xFF) << 24)
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static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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{
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bool smt_active = sched_smt_active();
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u64 spec_ctrl = spec_ctrl_current();
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int ret;
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if (smt_active)
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wrmsrl(MSR_IA32_SPEC_CTRL, 0);
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ret = intel_idle(dev, drv, index);
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if (smt_active)
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wrmsrl(MSR_IA32_SPEC_CTRL, spec_ctrl);
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return ret;
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}
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/*
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* States are indexed by the cstate number,
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* which is also the index into the MWAIT hint array.
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@ -605,7 +631,7 @@ static struct cpuidle_state skl_cstates[] = {
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{
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.name = "C6",
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.desc = "MWAIT 0x20",
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 85,
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.target_residency = 200,
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.enter = &intel_idle,
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@ -613,7 +639,7 @@ static struct cpuidle_state skl_cstates[] = {
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{
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.name = "C7s",
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.desc = "MWAIT 0x33",
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.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 124,
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.target_residency = 800,
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.enter = &intel_idle,
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@ -621,7 +647,7 @@ static struct cpuidle_state skl_cstates[] = {
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{
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.name = "C8",
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.desc = "MWAIT 0x40",
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 200,
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.target_residency = 800,
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.enter = &intel_idle,
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@ -629,7 +655,7 @@ static struct cpuidle_state skl_cstates[] = {
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{
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.name = "C9",
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.desc = "MWAIT 0x50",
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.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 480,
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.target_residency = 5000,
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.enter = &intel_idle,
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@ -637,7 +663,7 @@ static struct cpuidle_state skl_cstates[] = {
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{
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.name = "C10",
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.desc = "MWAIT 0x60",
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.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 890,
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.target_residency = 5000,
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.enter = &intel_idle,
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@ -666,7 +692,7 @@ static struct cpuidle_state skx_cstates[] = {
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{
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.name = "C6",
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.desc = "MWAIT 0x20",
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 133,
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.target_residency = 600,
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.enter = &intel_idle,
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@ -1372,6 +1398,11 @@ static void __init intel_idle_cpuidle_driver_init(void)
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drv->states[drv->state_count] = /* structure copy */
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cpuidle_state_table[cstate];
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if (cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS) &&
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cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_IBRS) {
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drv->states[drv->state_count].enter = intel_idle_ibrs;
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}
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drv->state_count += 1;
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}
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