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Revert "icnss2: Enable PHY processor SSR along with WPSS SSR"

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This reverts commit 047f485e92.

Change-Id: I2125637403cd445066a849a8913d02e4897b2a8f
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
This commit is contained in:
Naman Padhiar 2021-09-16 23:32:32 -07:00
commit c06d158bdb
4 changed files with 0 additions and 37 deletions
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1
arch/arm64/configs/vendor/lahaina_QGKI.config vendored
View file

@ -168,7 +168,6 @@ CONFIG_SLIMBUS_MSM_NGD=m
CONFIG_QCOM_KGSL=y
CONFIG_QCOM_KGSL_CONTEXT_DEBUG=y
CONFIG_QCOM_QFPROM=y
CONFIG_ICNSS2_RESTART_LEVEL_NOTIF=y
CONFIG_ARM_QCOM_CPUFREQ_HW=y
CONFIG_NETFILTER_XT_TARGET_TEE=y
CONFIG_NETFILTER_XT_TARGET_NOTRACK=y

9
drivers/soc/qcom/icnss2/Kconfig
View file

@ -28,15 +28,6 @@ config ICNSS2_QMI
and configurations. It also send WLAN on/off control message to FW
over QMI channel.
config ICNSS2_RESTART_LEVEL_NOTIF
bool "Enable Restart level change notification"
depends on ICNSS2
help
Say 'Y' here to enable ICNSS2_RESTART_LEVEL_NOTIF support.
This will be needed to register notifier and get notification for
restart_level change of WLAN Sub system. On receiving notification
ICNSS2 enable/disable M3 SSR. This is only enabled for QGKI config.
config CNSS_QCA6750
bool "Enable ICNSS QCA6750 chipset specific changes"
depends on ICNSS2

23
drivers/soc/qcom/icnss2/main.c
View file

@ -44,7 +44,6 @@
#include <soc/qcom/ramdump.h>
#include <linux/soc/qcom/smem.h>
#include <linux/soc/qcom/smem_state.h>
#include <trace/events/trace_msm_ssr_event.h>
#include "main.h"
#include "qmi.h"
#include "debug.h"
@ -3908,22 +3907,6 @@ static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
"use-nv-mac");
}
#ifdef CONFIG_ICNSS2_RESTART_LEVEL_NOTIF
static void pil_restart_level_notifier(void *ignore,
int restart_level,
const char *fw)
{
icnss_pr_err("PIL Notifier, restart_level: %d, FW:%s",
restart_level, fw);
if (!strcmp(fw, "wpss")) {
if (restart_level == RESET_SUBSYS_COUPLED)
icnss_send_smp2p(penv, ICNSS_ENABLE_M3_SSR);
else
icnss_send_smp2p(penv, ICNSS_DISABLE_M3_SSR);
}
}
#endif
static int icnss_probe(struct platform_device *pdev)
{
int ret = 0;
@ -4040,9 +4023,6 @@ static int icnss_probe(struct platform_device *pdev)
icnss_pr_dbg("NV MAC feature is %s\n",
priv->use_nv_mac ? "Mandatory":"Not Mandatory");
INIT_WORK(&wpss_loader, icnss_wpss_load);
#ifdef CONFIG_ICNSS2_RESTART_LEVEL_NOTIF
register_trace_pil_restart_level(pil_restart_level_notifier, NULL);
#endif
}
INIT_LIST_HEAD(&priv->icnss_tcdev_list);
@ -4074,9 +4054,6 @@ static int icnss_remove(struct platform_device *pdev)
icnss_dms_deinit(priv);
icnss_genl_exit();
icnss_runtime_pm_deinit(priv);
#ifdef CONFIG_ICNSS2_RESTART_LEVEL_NOTIF
unregister_trace_pil_restart_level(pil_restart_level_notifier, NULL);
#endif
}
device_init_wakeup(&priv->pdev->dev, false);

4
drivers/soc/qcom/icnss2/main.h
View file

@ -183,10 +183,6 @@ enum icnss_smp2p_msg_id {
ICNSS_POWER_SAVE_ENTER = 1,
ICNSS_POWER_SAVE_EXIT,
ICNSS_TRIGGER_SSR,
#ifdef CONFIG_ICNSS2_RESTART_LEVEL_NOTIF
ICNSS_ENABLE_M3_SSR,
ICNSS_DISABLE_M3_SSR,
#endif
ICNSS_PCI_EP_POWER_SAVE_ENTER = 6,
ICNSS_PCI_EP_POWER_SAVE_EXIT,
};