mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Linux 5.0-rc7
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlxqHJYeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGWl8H/jPI4EipzD2GbnjZ GaFpMBBjcXBaVmoA+Y69so+7BHx1Ql+5GQtqbK0RHJRb9qEPLw3FBhHNjM/N8Sgf nSrK+GnBZp9s+k/NR/Yf2RacUR3jhz+Q9JEoQd3u9bFUeQyvE8Rf3vgtoBBwFOfz +t7N1memYVF3asLGWB4e4sP1YVMGfseTQpSPojvM30YWM86Bv+QtSx1AGgHczQIM kMKealR8ZPelN6JAXgLhQ5opDojBrE4YKB98pwsMDI6abz0Tz2JLFEUTTxsv5XNN o/Iz+XDoylskEyxN2unNWfHx7Swkvoklog8J/hDg5XlTvipL/WkT66PHBgcGMNvj BW9GgU8= =ZizU -----END PGP SIGNATURE----- Merge v5.0-rc7 into drm-next Backmerging for nouveau and imx that needed some fixes for next pulls. Signed-off-by: Dave Airlie <[email protected]>
This commit is contained in:
commit
c06de56121
1765 changed files with 18706 additions and 9446 deletions
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@ -32,7 +32,7 @@
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/* register 0x01 */
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#define REF_FREF_SEL_25 BIT(0)
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#define PHY_MODE_SATA (0x0 << 5)
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#define PHY_BERLIN_MODE_SATA (0x0 << 5)
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/* register 0x02 */
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#define USE_MAX_PLL_RATE BIT(12)
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@ -102,7 +102,8 @@ static int phy_berlin_sata_power_on(struct phy *phy)
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/* set PHY mode and ref freq to 25 MHz */
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phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
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0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA);
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0x00ff,
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REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
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/* set PHY up to 6 Gbps */
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phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,
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@ -31,7 +31,7 @@ static int ath79_usb_phy_power_on(struct phy *phy)
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err = reset_control_deassert(priv->reset);
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if (err && priv->no_suspend_override)
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reset_control_assert(priv->no_suspend_override);
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reset_control_deassert(priv->no_suspend_override);
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return err;
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}
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@ -69,7 +69,7 @@ static int ath79_usb_phy_probe(struct platform_device *pdev)
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if (!priv)
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return -ENOMEM;
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priv->reset = devm_reset_control_get(&pdev->dev, "usb-phy");
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priv->reset = devm_reset_control_get(&pdev->dev, "phy");
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if (IS_ERR(priv->reset))
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return PTR_ERR(priv->reset);
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@ -82,6 +82,7 @@ config PHY_TI_GMII_SEL
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default y if TI_CPSW=y
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depends on TI_CPSW || COMPILE_TEST
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select GENERIC_PHY
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select REGMAP
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default m
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help
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This driver supports configuring of the TI CPSW Port mode depending on
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@ -204,11 +204,11 @@ static struct phy *phy_gmii_sel_of_xlate(struct device *dev,
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if (args->args_count < 1)
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return ERR_PTR(-EINVAL);
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if (!priv || !priv->if_phys)
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return ERR_PTR(-ENODEV);
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if (priv->soc_data->features & BIT(PHY_GMII_SEL_RMII_IO_CLK_EN) &&
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args->args_count < 2)
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return ERR_PTR(-EINVAL);
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if (!priv || !priv->if_phys)
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return ERR_PTR(-ENODEV);
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if (phy_id > priv->soc_data->num_ports)
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return ERR_PTR(-EINVAL);
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if (phy_id != priv->if_phys[phy_id - 1].id)
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