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clk: exynos5420: Add IDs for clocks used in PD mfc

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Adds IDs for MUX clocks to be used by power domain for MFC
for doing re-parenting while pd on/off.

Signed-off-by: Arun Kumar K <[email protected]>
Signed-off-by: Shaik Ameer Basha <[email protected]>
Acked-by: Tomasz Figa <[email protected]>
Signed-off-by: Kukjin Kim <[email protected]>
This commit is contained in:
Arun Kumar K 2014-07-11 08:03:59 +09:00 • committed by Kukjin Kim
commit c0fb262bf2
2 changed files with 6 additions and 2 deletions
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2
include/dt-bindings/clock/exynos5420.h
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@ -203,6 +203,8 @@
#define CLK_MOUT_G3D 641
#define CLK_MOUT_VPLL 642
#define CLK_MOUT_MAUDIO0 643
#define CLK_MOUT_USER_ACLK333 644
#define CLK_MOUT_SW_ACLK333 645
/* divider clocks */
#define CLK_DOUT_PIXEL 768