From f72cdf3adab12cfa1ece6b5e065888abf916dcf5 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Sun, 9 Aug 2020 23:05:13 +0530 Subject: [PATCH] clk: qcom: gcc: update frequency table for csi3phytimer clock The Fmax table is updated as per the HW recommendation for csi3phytimer clock. Also at the same time remove the unwanted clk set rate flag for display rot clock. Change-Id: I761f2cb99da27d4d04dbbf95dd546faefdad225a Signed-off-by: Taniya Das --- drivers/clk/qcom/dispcc-holi.c | 1 - drivers/clk/qcom/gcc-holi.c | 14 +++----------- drivers/clk/qcom/gpucc-holi.c | 1 + 3 files changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/clk/qcom/dispcc-holi.c b/drivers/clk/qcom/dispcc-holi.c index 913c888965ee..2d3b236503ea 100644 --- a/drivers/clk/qcom/dispcc-holi.c +++ b/drivers/clk/qcom/dispcc-holi.c @@ -289,7 +289,6 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { .name = "disp_cc_mdss_rot_clk_src", .parent_data = disp_cc_parent_data_1, .num_parents = 5, - .flags = CLK_SET_RATE_PARENT, .ops = &clk_rcg2_ops, }, .clkr.vdd_data = { diff --git a/drivers/clk/qcom/gcc-holi.c b/drivers/clk/qcom/gcc-holi.c index 8ed936e906d7..295957e1f0cb 100644 --- a/drivers/clk/qcom/gcc-holi.c +++ b/drivers/clk/qcom/gcc-holi.c @@ -992,20 +992,12 @@ static struct clk_rcg2 gcc_camss_csi2phytimer_clk_src = { }, }; -static const struct freq_tbl ftbl_gcc_camss_csi3phytimer_clk_src[] = { - F(19200000, P_BI_TCXO, 1, 0, 0), - F(133333333, P_GPLL0_OUT_ODD, 1.5, 0, 0), - F(200000000, P_GPLL0_OUT_ODD, 1, 0, 0), - F(268800000, P_GPLL4_OUT_EVEN, 3, 0, 0), - { } -}; - static struct clk_rcg2 gcc_camss_csi3phytimer_clk_src = { .cmd_rcgr = 0x59054, .mnd_width = 0, .hid_width = 5, .parent_map = gcc_parent_map_4, - .freq_tbl = ftbl_gcc_camss_csi3phytimer_clk_src, + .freq_tbl = ftbl_gcc_camss_csi0phytimer_clk_src, .enable_safe_config = true, .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_camss_csi3phytimer_clk_src", @@ -1018,8 +1010,7 @@ static struct clk_rcg2 gcc_camss_csi3phytimer_clk_src = { .num_rate_max = VDD_NUM, .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 19200000, - [VDD_LOW] = 133333333, - [VDD_LOW_L1] = 200000000, + [VDD_LOW] = 200000000, [VDD_NOMINAL] = 268800000}, }, }; @@ -3181,6 +3172,7 @@ static struct clk_branch gcc_gpu_memnoc_gfx_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gpu_memnoc_gfx_clk", + .flags = CLK_DONT_HOLD_STATE, .ops = &clk_branch2_ops, }, }, diff --git a/drivers/clk/qcom/gpucc-holi.c b/drivers/clk/qcom/gpucc-holi.c index 8a7cc21379bb..7621bbaca089 100644 --- a/drivers/clk/qcom/gpucc-holi.c +++ b/drivers/clk/qcom/gpucc-holi.c @@ -344,6 +344,7 @@ static struct clk_branch gpu_cc_cxo_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gpu_cc_cxo_clk", + .flags = CLK_DONT_HOLD_STATE, .ops = &clk_branch2_ops, }, },