A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-07 12:25:00 -04:00
Code Issues Projects Releases Packages Wiki Activity

msm: pci: Configure clkreq gpio wakeup capability at runtime

Browse source 
By default pinctrl driver is disabling wakeup capability for gpios
for which interrupt is not registered. This could cause wakeup from
L1SS sleep not working. Hence fix it by enabling/disabling wakeup
capability for clkreq gpio as part of DRV suspend/resume handling.

Change-Id: If8fcb0a3a638c560bfe1f614aa00b7fd872c6b98
Signed-off-by: Vivek Pernamitta <vpernami@codeaurora.org>
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
This commit is contained in:
Vivek Pernamitta 2021-01-12 21:49:10 +05:30 • committed by Gerrit - the friendly Code Review server
commit c1da4dfce4
1 changed files with 16 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

16
drivers/pci/controller/pci-msm.c
View file

@ -36,6 +36,7 @@
#include <linux/types.h>
#include <linux/uaccess.h>
#include <soc/qcom/subsystem_notif.h>
#include <linux/pinctrl/qcom-pinctrl.h>
#include "../pci.h"
@ -764,6 +765,7 @@ struct msm_pcie_dev_t {
uint32_t gpio_n;
uint32_t parf_deemph;
uint32_t parf_swing;
uint32_t clkreq_gpio;
struct msm_pcie_vreg_info_t *cx_vreg;
struct msm_pcie_clk_info_t *rate_change_clk;
@ -6266,6 +6268,12 @@ static int msm_pcie_probe(struct platform_device *pdev)
PCIE_DBG(pcie_dev, "RC%d: aux clock frequency: %d.\n",
pcie_dev->rc_idx, pcie_dev->aux_clk_freq);
of_property_read_u32(of_node, "qcom,clkreq-gpio",
&pcie_dev->clkreq_gpio);
PCIE_DBG(pcie_dev, "RC%d: clkreq gpio no:%u\n",
pcie_dev->rc_idx, pcie_dev->clkreq_gpio);
pcie_dev->shadow_en = true;
pcie_dev->aer_enable = true;
@ -7725,6 +7733,10 @@ static int msm_pcie_drv_resume(struct msm_pcie_dev_t *pcie_dev)
PCIE_DBG(pcie_dev, "PCIe RC%d: LTSSM_STATE: %s\n",
pcie_dev->rc_idx, TO_LTSSM_STR(val & 0x3f));
msm_gpio_mpm_wake_set(pcie_dev->clkreq_gpio, false);
PCIE_DBG(pcie_dev, "PCIe: RC%d: disable wake up cap for CLKREQ GPIO\n",
pcie_dev->rc_idx);
mutex_unlock(&pcie_dev->setup_lock);
mutex_unlock(&pcie_dev->recovery_lock);
@ -7747,6 +7759,10 @@ static int msm_pcie_drv_suspend(struct msm_pcie_dev_t *pcie_dev,
}
mutex_lock(&pcie_dev->recovery_lock);
msm_gpio_mpm_wake_set(pcie_dev->clkreq_gpio, true);
PCIE_DBG(pcie_dev, "PCIe: RC%d:Enable wake up cap for CLKREQ GPIO\n",
pcie_dev->rc_idx);
/* disable global irq - no more linkdown/aer detection */
disable_irq(pcie_dev->irq[MSM_PCIE_INT_GLOBAL_INT].num);