mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-25 22:23:14 -04:00
wigig_sensing: do not deassert DRI on Data Ready DRI
This change is a performance optimization. Instead of sending a DRI deassert command at the end of a Data Ready DRI, the FW shall get a FIFO empty internal signal. FW sets the don't deassert bit in relevant cases, like Data Ready DRI, or SYSASSERT DRI. Change-Id: I810e891a82b80c256857987b446c2162bacc399e Signed-off-by: Gidon Studinski <gidons@codeaurora.org> Signed-off-by: Alexei Avshalom Lazar <ailizaro@codeaurora.org>
This commit is contained in:
parent
33476c9af5
commit
c2b73353eb
2 changed files with 14 additions and 6 deletions
|
|
@ -539,12 +539,12 @@ static int wigig_sensing_ioc_change_mode(struct wigig_sensing_ctx *ctx,
|
|||
}
|
||||
|
||||
/* Send command to FW */
|
||||
mutex_lock(&ctx->dri_lock);
|
||||
ctx->stm.change_mode_in_progress = true;
|
||||
ch = req.has_channel ? req.channel : 0;
|
||||
ctx->stm.channel_request = ch;
|
||||
ctx->stm.burst_size_ready = false;
|
||||
/* Change mode command must not be called during DRI processing */
|
||||
mutex_lock(&ctx->dri_lock);
|
||||
rc = wigig_sensing_send_change_mode_command(ctx, req.mode, ch);
|
||||
mutex_unlock(&ctx->dri_lock);
|
||||
if (rc) {
|
||||
|
|
@ -1213,6 +1213,7 @@ static irqreturn_t wigig_sensing_dri_isr_thread(int irq, void *cookie)
|
|||
u32 sanity_reg = 0;
|
||||
union user_rgf_spi_mbox_inb additional_inb_command;
|
||||
u8 num_retries = 0;
|
||||
bool dont_deassert = false;
|
||||
|
||||
mutex_lock(&ctx->dri_lock);
|
||||
|
||||
|
|
@ -1281,6 +1282,10 @@ static irqreturn_t wigig_sensing_dri_isr_thread(int irq, void *cookie)
|
|||
goto bail_out;
|
||||
}
|
||||
|
||||
if (spi_status.b.int_dont_deassert) {
|
||||
dont_deassert = true;
|
||||
spi_status.v &= ~INT_DONT_DEASSERT;
|
||||
}
|
||||
if (spi_status.b.int_sysassert) {
|
||||
enum wigig_sensing_stm_e old_state = ctx->stm.state;
|
||||
|
||||
|
|
@ -1356,10 +1361,12 @@ static irqreturn_t wigig_sensing_dri_isr_thread(int irq, void *cookie)
|
|||
|
||||
deassert_and_bail_out:
|
||||
/* Notify FW we are done with interrupt handling */
|
||||
rc = wigig_sensing_deassert_dri(ctx, additional_inb_command);
|
||||
if (rc)
|
||||
pr_err("wigig_sensing_deassert_dri() failed, rc=%d\n",
|
||||
rc);
|
||||
if (!dont_deassert || additional_inb_command.b.mode != 0) {
|
||||
rc = wigig_sensing_deassert_dri(ctx, additional_inb_command);
|
||||
if (rc)
|
||||
pr_err("wigig_sensing_deassert_dri() failed, rc=%d\n",
|
||||
rc);
|
||||
}
|
||||
|
||||
bail_out:
|
||||
mutex_unlock(&ctx->dri_lock);
|
||||
|
|
|
|||
|
|
@ -51,6 +51,7 @@
|
|||
#define INT_FW_READY BIT(24)
|
||||
#define INT_DATA_READY BIT(25)
|
||||
#define INT_FIFO_READY BIT(26)
|
||||
#define INT_DONT_DEASSERT BIT(27)
|
||||
#define INT_SYSASSERT BIT(29)
|
||||
#define INT_DEEP_SLEEP_EXIT BIT(30)
|
||||
union user_rgf_spi_status {
|
||||
|
|
@ -67,7 +68,7 @@ union user_rgf_spi_status {
|
|||
u8 int_fw_ready:1; /* FW MBOX ready */
|
||||
u8 int_data_ready:1; /* data available on FIFO */
|
||||
u8 int_fifo_ready:1; /* FIFO status update */
|
||||
u8 reserved2:1;
|
||||
u8 int_dont_deassert:1; /* Don't deassert DRI */
|
||||
u8 reserved3:1;
|
||||
u8 int_sysassert:1; /* SYSASSERT occurred */
|
||||
u8 int_deep_sleep_exit:1;
|
||||
|
|
|
|||
Loading…
Reference in a new issue