diff --git a/qcom/shima.dtsi b/qcom/shima.dtsi
index 3e2dd664a680..d19f8638950a 100644
--- a/qcom/shima.dtsi
+++ b/qcom/shima.dtsi
@@ -1803,6 +1803,8 @@
 		mmc-hs400-1_8v;
 		mmc-hs400-enhanced-strobe;
 
+		cap-mmc-hw-reset;
+
 		bus-width = <8>;
 		non-removable;
 		supports-cqe;
@@ -1810,6 +1812,10 @@
 		qcom,devfreq,freq-table = <50000000 200000000>;
 		qcom,scaling-lower-bus-speed-mode = "DDR52";
 
+		/* Add dt entry for gcc hw reset */
+		resets = <&gcc GCC_SDCC1_BCR>;
+		reset-names = "core_reset";
+
 		status = "disabled";
 
 		qos0 {