From c2e51390fffe2e1a02b6f2129afe400be087827f Mon Sep 17 00:00:00 2001 From: Mukesh Kumar Savaliya Date: Wed, 18 Aug 2021 12:42:49 +0530 Subject: [PATCH] i2c: i2c-msm-geni: Change the high and low time for SCL This change is to meet the spec for i2c at 400KHz. Note that there is a QUP FW change along with this and then only this will work. FW change takes care of the duty cycle, clock on/off. FW change CR : 3019821 CR fixed : 3017809. Change-Id: I7c03d78ce4c54454b0bb66dcd587f327e63d07e1 Signed-off-by: Mukesh Kumar Savaliya --- drivers/i2c/busses/i2c-msm-geni.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-msm-geni.c b/drivers/i2c/busses/i2c-msm-geni.c index d1c7af60c50f..33aa3d597edd 100644 --- a/drivers/i2c/busses/i2c-msm-geni.c +++ b/drivers/i2c/busses/i2c-msm-geni.c @@ -171,7 +171,7 @@ struct geni_i2c_clk_fld { static struct geni_i2c_clk_fld geni_i2c_clk_map[] = { {KHz(100), 7, 10, 11, 26}, - {KHz(400), 2, 5, 12, 24}, + {KHz(400), 2, 7, 10, 24}, {KHz(1000), 1, 3, 9, 18}, };