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Merge master.kernel.org:/home/rmk/linux-2.6-arm

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* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
  ARM: Fix RiscPC decompressor build errors
  ARM: Fix sorting of platform group config options and includes
  ARM: 5991/1: Fix regression in restore_user_regs macro
  ARM: 5989/1: ARM: KGDB: add support for SMP platforms
  ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush
  ARM: Add final piece to fix XIP decompressor in read-only memory
  video: enable sh_mobile_lcdc on SH-Mobile ARM
  ARM: mach-shmobile: ap4evb SDHI0 platform data V2
  ARM: mach-shmobile: sh7372 SDHI vector merge
  ARM: mach-shmobile: sh7377 SDHI vector merge
  ARM: mach-shmobile: sh7367 SDHI vector merge
  ARM: mach-shmobile: G4EVM KEYSC platform data
  mtd: enable sh_flctl on SH-Mobile ARM
  ARM: mach-shmobile: G3EVM FLCTL platform data
  ARM: mach-shmobile: G3EVM KEYSC platform data
  Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
  ARM: Add L2 cache handling to smp boot support
  ARM: 5960/1: ARM: perf-events: fix v7 event selection mask
  ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
  ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds
  ...
This commit is contained in:
Linus Torvalds 2010-03-18 16:59:10 -07:00
commit c3a0bd7515
23 changed files with 403 additions and 134 deletions
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2
drivers/video/Kconfig
View file

@ -1881,7 +1881,7 @@ config FB_W100
config FB_SH_MOBILE_LCDC
tristate "SuperH Mobile LCDC framebuffer support"
depends on FB && SUPERH && HAVE_CLK
depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
select FB_SYS_IMAGEBLIT

31
drivers/video/amba-clcd.c
View file

@ -65,16 +65,16 @@ static void clcdfb_disable(struct clcd_fb *fb)
if (fb->board->disable)
fb->board->disable(fb);
val = readl(fb->regs + CLCD_CNTL);
val = readl(fb->regs + fb->off_cntl);
if (val & CNTL_LCDPWR) {
val &= ~CNTL_LCDPWR;
writel(val, fb->regs + CLCD_CNTL);
writel(val, fb->regs + fb->off_cntl);
clcdfb_sleep(20);
}
if (val & CNTL_LCDEN) {
val &= ~CNTL_LCDEN;
writel(val, fb->regs + CLCD_CNTL);
writel(val, fb->regs + fb->off_cntl);
}
/*
@ -94,7 +94,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
* Bring up by first enabling..
*/
cntl |= CNTL_LCDEN;
writel(cntl, fb->regs + CLCD_CNTL);
writel(cntl, fb->regs + fb->off_cntl);
clcdfb_sleep(20);
@ -102,7 +102,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
* and now apply power.
*/
cntl |= CNTL_LCDPWR;
writel(cntl, fb->regs + CLCD_CNTL);
writel(cntl, fb->regs + fb->off_cntl);
/*
* finally, enable the interface.
@ -233,7 +233,7 @@ static int clcdfb_set_par(struct fb_info *info)
readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
readl(fb->regs + CLCD_IENB), readl(fb->regs + CLCD_CNTL));
readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
#endif
return 0;
@ -345,6 +345,23 @@ static int clcdfb_register(struct clcd_fb *fb)
{
int ret;
/*
* ARM PL111 always has IENB at 0x1c; it's only PL110
* which is reversed on some platforms.
*/
if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
fb->off_ienb = CLCD_PL111_IENB;
fb->off_cntl = CLCD_PL111_CNTL;
} else {
#ifdef CONFIG_ARCH_VERSATILE
fb->off_ienb = CLCD_PL111_IENB;
fb->off_cntl = CLCD_PL111_CNTL;
#else
fb->off_ienb = CLCD_PL110_IENB;
fb->off_cntl = CLCD_PL110_CNTL;
#endif
}
fb->clk = clk_get(&fb->dev->dev, NULL);
if (IS_ERR(fb->clk)) {
ret = PTR_ERR(fb->clk);
@ -416,7 +433,7 @@ static int clcdfb_register(struct clcd_fb *fb)
/*
* Ensure interrupts are disabled.
*/
writel(0, fb->regs + CLCD_IENB);
writel(0, fb->regs + fb->off_ienb);
fb_set_var(&fb->fb, &fb->fb.var);