mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits) [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. [MIPS] Remove unused definition of cpu_to_lelongp() [MIPS] Remove userspace proofing from <asm/bitops.h>. [MIPS] Remove old junk left from old atomic_lock. [MIPS] Use conditional traps for BUG_ON on MIPS II and better. [MIPS] mips HPT cleanup: make clocksource_mips public [MIPS] do_IRQ cleanup [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. [MIPS] Remove redundant r4k_blast_icache() calls [MIPS] Work around bogus gcc warnings. [MIPS] Fix double inclusions [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq [MIPS] IRQ cleanups [MIPS] mips hpt cleanup: get rid of mips_hpt_init [MIPS] PB1200: Remove duplicate definitions [MIPS] Fix alignment hole in struct cache_desc; shrink struct. [MIPS] Oprofile: kernel support for the R10000. [MIPS] Remove unused R10000 performance counter definitions. [MIPS] Add support for kexec [MIPS] Don't print presence of WAIT instruction on bootup. ...
This commit is contained in:
Linus Torvalds
commit
c3e59d1e89
99 changed files with 1081 additions and 2127 deletions
|
|
@ -19,12 +19,16 @@
|
|||
#define _ATYPE_
|
||||
#define _ATYPE32_
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||||
#define _ATYPE64_
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||||
#define _LLCONST_(x) x
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||||
#define _CONST64_(x) x
|
||||
#else
|
||||
#define _ATYPE_ __PTRDIFF_TYPE__
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||||
#define _ATYPE32_ int
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||||
#define _ATYPE64_ long long
|
||||
#define _LLCONST_(x) x ## LL
|
||||
#define _ATYPE64_ __s64
|
||||
#ifdef CONFIG_64BIT
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||||
#define _CONST64_(x) x ## L
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||||
#else
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||||
#define _CONST64_(x) x ## LL
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||||
#endif
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||||
#endif
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||||
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||||
/*
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||||
|
|
@ -48,7 +52,7 @@
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|||
*/
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||||
#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
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#define XPHYSADDR(a) ((_ACAST64_(a)) & \
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_LLCONST_(0x000000ffffffffff))
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_CONST64_(0x000000ffffffffff))
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||||
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||||
#ifdef CONFIG_64BIT
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||||
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|
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@ -57,14 +61,14 @@
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* The compatibility segments use the full 64-bit sign extended value. Note
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* the R8000 doesn't have them so don't reference these in generic MIPS code.
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*/
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#define XKUSEG _LLCONST_(0x0000000000000000)
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#define XKSSEG _LLCONST_(0x4000000000000000)
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#define XKPHYS _LLCONST_(0x8000000000000000)
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#define XKSEG _LLCONST_(0xc000000000000000)
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#define CKSEG0 _LLCONST_(0xffffffff80000000)
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#define CKSEG1 _LLCONST_(0xffffffffa0000000)
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#define CKSSEG _LLCONST_(0xffffffffc0000000)
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#define CKSEG3 _LLCONST_(0xffffffffe0000000)
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#define XKUSEG _CONST64_(0x0000000000000000)
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#define XKSSEG _CONST64_(0x4000000000000000)
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#define XKPHYS _CONST64_(0x8000000000000000)
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#define XKSEG _CONST64_(0xc000000000000000)
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#define CKSEG0 _CONST64_(0xffffffff80000000)
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#define CKSEG1 _CONST64_(0xffffffffa0000000)
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#define CKSSEG _CONST64_(0xffffffffc0000000)
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#define CKSEG3 _CONST64_(0xffffffffe0000000)
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#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
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#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
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@ -122,7 +126,7 @@
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#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
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#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
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#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
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#define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \
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#define PHYS_TO_XKPHYS(cm,a) (_CONST64_(0x8000000000000000) | \
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((cm)<<59) | (a))
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#if defined (CONFIG_CPU_R4300) \
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@ -132,20 +136,20 @@
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|| defined (CONFIG_CPU_NEVADA) \
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|| defined (CONFIG_CPU_TX49XX) \
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|| defined (CONFIG_CPU_MIPS64)
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#define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */
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#define TO_PHYS_MASK _CONST64_(0x0000000fffffffff) /* 2^^36 - 1 */
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#endif
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#if defined (CONFIG_CPU_R8000)
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/* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
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#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
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#define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */
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#endif
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|
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#if defined (CONFIG_CPU_R10000)
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||||
#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
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#define TO_PHYS_MASK _CONST64_(0x000000ffffffffff) /* 2^^40 - 1 */
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#endif
|
||||
|
||||
#if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
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||||
#define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */
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||||
#define TO_PHYS_MASK _CONST64_(0x00000fffffffffff) /* 2^^44 - 1 */
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||||
#endif
|
||||
|
||||
#ifndef CONFIG_CPU_R8000
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|
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@ -155,7 +159,7 @@
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|||
* in order to catch bugs in the source code.
|
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*/
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|
||||
#define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000)
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#define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000)
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||||
#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
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||||
|
||||
#endif
|
||||
|
|
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|||
|
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@ -9,16 +9,8 @@
|
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* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 1996, 97, 99, 2000, 03, 04 by Ralf Baechle
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* Copyright (C) 1996, 97, 99, 2000, 03, 04, 06 by Ralf Baechle
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||||
*/
|
||||
|
||||
/*
|
||||
* As workaround for the ATOMIC_DEC_AND_LOCK / atomic_dec_and_lock mess in
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* <linux/spinlock.h> we have to include <linux/spinlock.h> outside the
|
||||
* main big wrapper ...
|
||||
*/
|
||||
#include <linux/spinlock.h>
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||||
|
||||
#ifndef _ASM_ATOMIC_H
|
||||
#define _ASM_ATOMIC_H
|
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|
||||
|
|
|
|||
|
|
@ -10,51 +10,32 @@
|
|||
#define _ASM_BITOPS_H
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/irqflags.h>
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||||
#include <linux/types.h>
|
||||
#include <asm/bug.h>
|
||||
#include <asm/byteorder.h> /* sigh ... */
|
||||
#include <asm/cpu-features.h>
|
||||
#include <asm/sgidefs.h>
|
||||
#include <asm/war.h>
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||||
|
||||
#if (_MIPS_SZLONG == 32)
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#define SZLONG_LOG 5
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||||
#define SZLONG_MASK 31UL
|
||||
#define __LL "ll "
|
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#define __SC "sc "
|
||||
#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
|
||||
#elif (_MIPS_SZLONG == 64)
|
||||
#define SZLONG_LOG 6
|
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#define SZLONG_MASK 63UL
|
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#define __LL "lld "
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||||
#define __SC "scd "
|
||||
#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
|
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#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/irqflags.h>
|
||||
#include <asm/sgidefs.h>
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#include <asm/war.h>
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||||
|
||||
/*
|
||||
* clear_bit() doesn't provide any barrier for the compiler.
|
||||
*/
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() smp_mb()
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|
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/*
|
||||
* Only disable interrupt for kernel mode stuff to keep usermode stuff
|
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* that dares to use kernel include files alive.
|
||||
*/
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|
||||
#define __bi_flags unsigned long flags
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#define __bi_local_irq_save(x) local_irq_save(x)
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#define __bi_local_irq_restore(x) local_irq_restore(x)
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#else
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#define __bi_flags
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#define __bi_local_irq_save(x)
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#define __bi_local_irq_restore(x)
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#endif /* __KERNEL__ */
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||||
/*
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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@ -93,13 +74,13 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
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} else {
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volatile unsigned long *a = addr;
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unsigned long mask;
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__bi_flags;
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unsigned long flags;
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a += nr >> SZLONG_LOG;
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mask = 1UL << (nr & SZLONG_MASK);
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__bi_local_irq_save(flags);
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local_irq_save(flags);
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*a |= mask;
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||||
__bi_local_irq_restore(flags);
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local_irq_restore(flags);
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}
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}
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@ -141,13 +122,13 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
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} else {
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volatile unsigned long *a = addr;
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unsigned long mask;
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__bi_flags;
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unsigned long flags;
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a += nr >> SZLONG_LOG;
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mask = 1UL << (nr & SZLONG_MASK);
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__bi_local_irq_save(flags);
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local_irq_save(flags);
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*a &= ~mask;
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__bi_local_irq_restore(flags);
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local_irq_restore(flags);
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}
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}
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@ -191,13 +172,13 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
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} else {
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volatile unsigned long *a = addr;
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unsigned long mask;
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__bi_flags;
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unsigned long flags;
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a += nr >> SZLONG_LOG;
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mask = 1UL << (nr & SZLONG_MASK);
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__bi_local_irq_save(flags);
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local_irq_save(flags);
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*a ^= mask;
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__bi_local_irq_restore(flags);
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local_irq_restore(flags);
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}
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}
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@ -258,14 +239,14 @@ static inline int test_and_set_bit(unsigned long nr,
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volatile unsigned long *a = addr;
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unsigned long mask;
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int retval;
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__bi_flags;
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unsigned long flags;
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a += nr >> SZLONG_LOG;
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mask = 1UL << (nr & SZLONG_MASK);
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__bi_local_irq_save(flags);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a |= mask;
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__bi_local_irq_restore(flags);
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local_irq_restore(flags);
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return retval;
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}
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@ -330,14 +311,14 @@ static inline int test_and_clear_bit(unsigned long nr,
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volatile unsigned long *a = addr;
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unsigned long mask;
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int retval;
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__bi_flags;
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unsigned long flags;
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a += nr >> SZLONG_LOG;
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mask = 1UL << (nr & SZLONG_MASK);
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__bi_local_irq_save(flags);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a &= ~mask;
|
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__bi_local_irq_restore(flags);
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local_irq_restore(flags);
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return retval;
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}
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|
|
@ -399,23 +380,19 @@ static inline int test_and_change_bit(unsigned long nr,
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} else {
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volatile unsigned long *a = addr;
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unsigned long mask, retval;
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__bi_flags;
|
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unsigned long flags;
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|
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a += nr >> SZLONG_LOG;
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mask = 1UL << (nr & SZLONG_MASK);
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__bi_local_irq_save(flags);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a ^= mask;
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__bi_local_irq_restore(flags);
|
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local_irq_restore(flags);
|
||||
|
||||
return retval;
|
||||
}
|
||||
}
|
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|
||||
#undef __bi_flags
|
||||
#undef __bi_local_irq_save
|
||||
#undef __bi_local_irq_restore
|
||||
|
||||
#include <asm-generic/bitops/non-atomic.h>
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
#ifndef __ASM_BUG_H
|
||||
#define __ASM_BUG_H
|
||||
|
||||
#include <asm/sgidefs.h>
|
||||
|
||||
#ifdef CONFIG_BUG
|
||||
|
||||
|
|
@ -13,6 +14,17 @@ do { \
|
|||
|
||||
#define HAVE_ARCH_BUG
|
||||
|
||||
#if (_MIPS_ISA > _MIPS_ISA_MIPS1)
|
||||
|
||||
#define BUG_ON(condition) \
|
||||
do { \
|
||||
__asm__ __volatile__("tne $0, %0" : : "r" (condition)); \
|
||||
} while (0)
|
||||
|
||||
#define HAVE_ARCH_BUG_ON
|
||||
|
||||
#endif /* _MIPS_ISA > _MIPS_ISA_MIPS1 */
|
||||
|
||||
#endif
|
||||
|
||||
#include <asm-generic/bug.h>
|
||||
|
|
|
|||
|
|
@ -22,12 +22,12 @@
|
|||
* Descriptor for a cache
|
||||
*/
|
||||
struct cache_desc {
|
||||
unsigned short linesz; /* Size of line in bytes */
|
||||
unsigned short ways; /* Number of ways */
|
||||
unsigned short sets; /* Number of lines per set */
|
||||
unsigned int waysize; /* Bytes per way */
|
||||
unsigned int waybit; /* Bits to select in a cache set */
|
||||
unsigned int flags; /* Flags describing cache properties */
|
||||
unsigned short sets; /* Number of lines per set */
|
||||
unsigned char ways; /* Number of ways */
|
||||
unsigned char linesz; /* Size of line in bytes */
|
||||
unsigned char waybit; /* Bits to select in a cache set */
|
||||
unsigned char flags; /* Flags describing cache properties */
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -82,11 +82,9 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
extern u32 cached_kn02_csr;
|
||||
extern spinlock_t kn02_lock;
|
||||
extern void init_kn02_irqs(int base);
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -74,7 +74,9 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#ifndef GENERIC_ISA_DMA_SUPPORT_BROKEN
|
||||
#define MAX_DMA_CHANNELS 8
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The maximum address in KSEG0 that we can perform a DMA transfer to on this
|
||||
|
|
|
|||
|
|
@ -451,6 +451,13 @@
|
|||
#define GT_SDRAM_OPMODE_OP_MODE 3
|
||||
#define GT_SDRAM_OPMODE_OP_CBR 4
|
||||
|
||||
#define GT_TC_CONTROL_ENTC0_SHF 0
|
||||
#define GT_TC_CONTROL_ENTC0_MSK (MSK(1) << GT_TC_CONTROL_ENTC0_SHF)
|
||||
#define GT_TC_CONTROL_ENTC0_BIT GT_TC_CONTROL_ENTC0_MSK
|
||||
#define GT_TC_CONTROL_SELTC0_SHF 1
|
||||
#define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF)
|
||||
#define GT_TC_CONTROL_SELTC0_BIT GT_TC_CONTROL_SELTC0_MSK
|
||||
|
||||
|
||||
#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0
|
||||
#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
|
||||
|
|
@ -523,6 +530,13 @@
|
|||
#define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
|
||||
#define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK
|
||||
|
||||
#define GT_INTR_T0EXP_SHF 8
|
||||
#define GT_INTR_T0EXP_MSK (MSK(1) << GT_INTR_T0EXP_SHF)
|
||||
#define GT_INTR_T0EXP_BIT GT_INTR_T0EXP_MSK
|
||||
#define GT_INTR_RETRYCTR0_SHF 20
|
||||
#define GT_INTR_RETRYCTR0_MSK (MSK(1) << GT_INTR_RETRYCTR0_SHF)
|
||||
#define GT_INTR_RETRYCTR0_BIT GT_INTR_RETRYCTR0_MSK
|
||||
|
||||
/*
|
||||
* Misc
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -113,7 +113,7 @@ static inline void set_io_port_base(unsigned long base)
|
|||
* almost all conceivable cases a device driver should not be using
|
||||
* this function
|
||||
*/
|
||||
static inline unsigned long virt_to_phys(volatile void * address)
|
||||
static inline unsigned long virt_to_phys(volatile const void *address)
|
||||
{
|
||||
return (unsigned long)address - PAGE_OFFSET;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -24,8 +24,6 @@ static inline int irq_canonicalize(int irq)
|
|||
#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
|
||||
#endif
|
||||
|
||||
extern asmlinkage unsigned int do_IRQ(unsigned int irq);
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
/*
|
||||
* Clear interrupt mask handling "backstop" if irq_hwmask
|
||||
|
|
@ -43,8 +41,6 @@ do { \
|
|||
#define __DO_IRQ_SMTC_HOOK() do { } while (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PREEMPT
|
||||
|
||||
/*
|
||||
* do_IRQ handles all normal device IRQ's (the special
|
||||
* SMP cross-CPU interrupts have their own specific
|
||||
|
|
@ -57,12 +53,10 @@ do { \
|
|||
do { \
|
||||
irq_enter(); \
|
||||
__DO_IRQ_SMTC_HOOK(); \
|
||||
__do_IRQ((irq)); \
|
||||
generic_handle_irq(irq); \
|
||||
irq_exit(); \
|
||||
} while (0)
|
||||
|
||||
#endif
|
||||
|
||||
extern void arch_init_irq(void);
|
||||
extern void spurious_interrupt(void);
|
||||
|
||||
|
|
|
|||
32
include/asm-mips/kexec.h
Normal file
32
include/asm-mips/kexec.h
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
* kexec.h for kexec
|
||||
* Created by <nschichan@corp.free.fr> on Thu Oct 12 14:59:34 2006
|
||||
*
|
||||
* This source code is licensed under the GNU General Public License,
|
||||
* Version 2. See the file COPYING for more details.
|
||||
*/
|
||||
|
||||
#ifndef _MIPS_KEXEC
|
||||
# define _MIPS_KEXEC
|
||||
|
||||
/* Maximum physical address we can use pages from */
|
||||
#define KEXEC_SOURCE_MEMORY_LIMIT (0x20000000)
|
||||
/* Maximum address we can reach in physical address mode */
|
||||
#define KEXEC_DESTINATION_MEMORY_LIMIT (0x20000000)
|
||||
/* Maximum address we can use for the control code buffer */
|
||||
#define KEXEC_CONTROL_MEMORY_LIMIT (0x20000000)
|
||||
|
||||
#define KEXEC_CONTROL_CODE_SIZE 4096
|
||||
|
||||
/* The native architecture */
|
||||
#define KEXEC_ARCH KEXEC_ARCH_MIPS
|
||||
|
||||
#define MAX_NOTE_BYTES 1024
|
||||
|
||||
static inline void crash_setup_regs(struct pt_regs *newregs,
|
||||
struct pt_regs *oldregs)
|
||||
{
|
||||
/* Dummy implementation for now */
|
||||
}
|
||||
|
||||
#endif /* !_MIPS_KEXEC */
|
||||
|
|
@ -67,34 +67,9 @@
|
|||
#define COBALT_BRD_ID_QUBE2 0x5
|
||||
#define COBALT_BRD_ID_RAQ2 0x6
|
||||
|
||||
/*
|
||||
* Galileo chipset access macros for the Cobalt. The base address for
|
||||
* the GT64111 chip is 0x14000000
|
||||
*
|
||||
* Most of this really should go into a separate GT64111 header file.
|
||||
*/
|
||||
#define GT64111_IO_BASE 0x10000000UL
|
||||
#define GT64111_IO_END 0x11ffffffUL
|
||||
#define GT64111_MEM_BASE 0x12000000UL
|
||||
#define GT64111_MEM_END 0x13ffffffUL
|
||||
#define GT64111_BASE 0x14000000UL
|
||||
#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs))
|
||||
|
||||
#define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port))
|
||||
#define GALILEO_OUTL(val, port) \
|
||||
do { \
|
||||
*(volatile unsigned int *) GALILEO_REG(port) = (val); \
|
||||
} while (0)
|
||||
|
||||
#define GALILEO_INTR_T0EXP (1 << 8)
|
||||
#define GALILEO_INTR_RETRY_CTR (1 << 20)
|
||||
|
||||
#define GALILEO_ENTC0 0x01
|
||||
#define GALILEO_SELTC0 0x02
|
||||
|
||||
#define PCI_CFG_SET(devfn,where) \
|
||||
GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \
|
||||
(PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS)
|
||||
GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \
|
||||
(PCI_FUNC (devfn) << 8) | (where)))
|
||||
|
||||
#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
|
||||
# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */
|
||||
|
|
|
|||
|
|
@ -1 +1,27 @@
|
|||
/* there's something here ... in the dark */
|
||||
/*
|
||||
* Copyright (C) 2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#ifndef _COBALT_MACH_GT64120_H
|
||||
#define _COBALT_MACH_GT64120_H
|
||||
|
||||
/*
|
||||
* Cobalt uses GT64111. GT64111 is almost the same as GT64120.
|
||||
*/
|
||||
|
||||
#define GT64120_BASE CKSEG1ADDR(GT_DEF_BASE)
|
||||
|
||||
#endif /* _COBALT_MACH_GT64120_H */
|
||||
|
|
|
|||
|
|
@ -545,62 +545,6 @@
|
|||
#define MIPS_FPIR_L (_ULCAST_(1) << 21)
|
||||
#define MIPS_FPIR_F64 (_ULCAST_(1) << 22)
|
||||
|
||||
/*
|
||||
* R10000 performance counter definitions.
|
||||
*
|
||||
* FIXME: The R10000 performance counter opens a nice way to implement CPU
|
||||
* time accounting with a precission of one cycle. I don't have
|
||||
* R10000 silicon but just a manual, so ...
|
||||
*/
|
||||
|
||||
/*
|
||||
* Events counted by counter #0
|
||||
*/
|
||||
#define CE0_CYCLES 0
|
||||
#define CE0_INSN_ISSUED 1
|
||||
#define CE0_LPSC_ISSUED 2
|
||||
#define CE0_S_ISSUED 3
|
||||
#define CE0_SC_ISSUED 4
|
||||
#define CE0_SC_FAILED 5
|
||||
#define CE0_BRANCH_DECODED 6
|
||||
#define CE0_QW_WB_SECONDARY 7
|
||||
#define CE0_CORRECTED_ECC_ERRORS 8
|
||||
#define CE0_ICACHE_MISSES 9
|
||||
#define CE0_SCACHE_I_MISSES 10
|
||||
#define CE0_SCACHE_I_WAY_MISSPREDICTED 11
|
||||
#define CE0_EXT_INTERVENTIONS_REQ 12
|
||||
#define CE0_EXT_INVALIDATE_REQ 13
|
||||
#define CE0_VIRTUAL_COHERENCY_COND 14
|
||||
#define CE0_INSN_GRADUATED 15
|
||||
|
||||
/*
|
||||
* Events counted by counter #1
|
||||
*/
|
||||
#define CE1_CYCLES 0
|
||||
#define CE1_INSN_GRADUATED 1
|
||||
#define CE1_LPSC_GRADUATED 2
|
||||
#define CE1_S_GRADUATED 3
|
||||
#define CE1_SC_GRADUATED 4
|
||||
#define CE1_FP_INSN_GRADUATED 5
|
||||
#define CE1_QW_WB_PRIMARY 6
|
||||
#define CE1_TLB_REFILL 7
|
||||
#define CE1_BRANCH_MISSPREDICTED 8
|
||||
#define CE1_DCACHE_MISS 9
|
||||
#define CE1_SCACHE_D_MISSES 10
|
||||
#define CE1_SCACHE_D_WAY_MISSPREDICTED 11
|
||||
#define CE1_EXT_INTERVENTION_HITS 12
|
||||
#define CE1_EXT_INVALIDATE_REQ 13
|
||||
#define CE1_SP_HINT_TO_CEXCL_SC_BLOCKS 14
|
||||
#define CE1_SP_HINT_TO_SHARED_SC_BLOCKS 15
|
||||
|
||||
/*
|
||||
* These flags define in which privilege mode the counters count events
|
||||
*/
|
||||
#define CEB_USER 8 /* Count events in user mode, EXL = ERL = 0 */
|
||||
#define CEB_SUPERVISOR 4 /* Count events in supvervisor mode EXL = ERL = 0 */
|
||||
#define CEB_KERNEL 2 /* Count events in kernel mode EXL = ERL = 0 */
|
||||
#define CEB_EXL 1 /* Count events with EXL = 1, ERL = 0 */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -34,7 +34,9 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/pfn.h>
|
||||
#include <asm/cpu-features.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
extern void clear_page(void * page);
|
||||
extern void copy_page(void * to, void * from);
|
||||
|
|
@ -134,8 +136,14 @@ typedef struct { unsigned long pgprot; } pgprot_t;
|
|||
/* to align the pointer to the (next) page boundary */
|
||||
#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
|
||||
|
||||
#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
|
||||
#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
|
||||
#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
|
||||
#define __pa_page_offset(x) ((unsigned long)(x) < CKSEG0 ? PAGE_OFFSET : CKSEG0)
|
||||
#else
|
||||
#define __pa_page_offset(x) PAGE_OFFSET
|
||||
#endif
|
||||
#define __pa(x) ((unsigned long)(x) - __pa_page_offset(x))
|
||||
#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0))
|
||||
#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
|
||||
|
||||
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
|
||||
|
||||
|
|
@ -160,8 +168,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
|
|||
|
||||
#endif
|
||||
|
||||
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
|
||||
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
|
||||
#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
|
||||
#define virt_addr_valid(kaddr) pfn_valid(PFN_DOWN(virt_to_phys(kaddr)))
|
||||
|
||||
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
|
||||
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#include <asm/addrspace.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/cachectl.h>
|
||||
#include <asm/fixmap.h>
|
||||
|
||||
#include <asm-generic/pgtable-nopud.h>
|
||||
|
||||
|
|
@ -103,6 +104,13 @@
|
|||
#define VMALLOC_START MAP_BASE
|
||||
#define VMALLOC_END \
|
||||
(VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
|
||||
#if defined(CONFIG_MODULES) && !defined(CONFIG_BUILD_ELF64) && \
|
||||
VMALLOC_START != CKSSEG
|
||||
/* Load modules into 32bit-compatible segment. */
|
||||
#define MODULE_START CKSSEG
|
||||
#define MODULE_END (FIXADDR_START-2*PAGE_SIZE)
|
||||
extern pgd_t module_pg_dir[PTRS_PER_PGD];
|
||||
#endif
|
||||
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
|
||||
|
|
@ -174,7 +182,12 @@ static inline void pud_clear(pud_t *pudp)
|
|||
#define __pmd_offset(address) pmd_index(address)
|
||||
|
||||
/* to find an entry in a kernel page-table-directory */
|
||||
#ifdef MODULE_START
|
||||
#define pgd_offset_k(address) \
|
||||
((address) >= MODULE_START ? module_pg_dir : pgd_offset(&init_mm, 0UL))
|
||||
#else
|
||||
#define pgd_offset_k(address) pgd_offset(&init_mm, 0UL)
|
||||
#endif
|
||||
|
||||
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
|
||||
#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@ extern unsigned long empty_zero_page;
|
|||
extern unsigned long zero_page_mask;
|
||||
|
||||
#define ZERO_PAGE(vaddr) \
|
||||
(virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))
|
||||
(virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
|
||||
|
||||
#define __HAVE_ARCH_MOVE_PTE
|
||||
#define move_pte(pte, prot, old_addr, new_addr) \
|
||||
|
|
|
|||
|
|
@ -80,8 +80,6 @@ struct pt_regs {
|
|||
#define instruction_pointer(regs) ((regs)->cp0_epc)
|
||||
#define profile_pc(regs) instruction_pointer(regs)
|
||||
|
||||
extern void show_regs(struct pt_regs *);
|
||||
|
||||
extern asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/ptrace.h>
|
||||
#include <linux/rtc.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
extern spinlock_t rtc_lock;
|
||||
|
||||
|
|
@ -44,12 +45,10 @@ extern int (*mips_timer_state)(void);
|
|||
extern void (*mips_timer_ack)(void);
|
||||
|
||||
/*
|
||||
* High precision timer functions.
|
||||
* If mips_hpt_read is NULL, an R4k-compatible timer setup is attempted.
|
||||
* High precision timer clocksource.
|
||||
* If .read is NULL, an R4k-compatible timer setup is attempted.
|
||||
*/
|
||||
extern unsigned int (*mips_hpt_read)(void);
|
||||
extern void (*mips_hpt_init)(void);
|
||||
extern unsigned int mips_hpt_mask;
|
||||
extern struct clocksource clocksource_mips;
|
||||
|
||||
/*
|
||||
* to_tm() converts system time back to (year, mon, day, hour, min, sec).
|
||||
|
|
|
|||
Loading…
Reference in a new issue