From e4017af5d1d376f71081b5ea787a601e44d08e72 Mon Sep 17 00:00:00 2001
From: Yuanfang Zhang <yuanfang@qti.qualcomm.com>
Date: Fri, 15 Jan 2021 16:39:01 +0800
Subject: [PATCH] ARM: dts: msm: disable tpdm sdcc on holi

The clk of sdcc tpdm is not able to enable from kernel side, so
disable it.

Change-Id: I2cc4e791720910719689bf106c9c0157f81c9b09
---
 qcom/holi-coresight.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qcom/holi-coresight.dtsi b/qcom/holi-coresight.dtsi
index 75f31bf5d45e..964ea4bece57 100644
--- a/qcom/holi-coresight.dtsi
+++ b/qcom/holi-coresight.dtsi
@@ -808,6 +808,7 @@
 		clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
 		clock-names = "apb_pclk";
 		qcom,cmb-msr-skip;
+		status = "disabled";
 		out-ports {
 			port {
 				tpdm_sdcc0_out_tpda_qdss29: endpoint {
@@ -829,6 +830,7 @@
 		clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
 		clock-names = "apb_pclk";
 		qcom,cmb-msr-skip;
+		status = "disabled";
 		out-ports {
 			port {
 				tpdm_sdcc1_out_tpda_qdss30: endpoint {