From c41566955e034fe62303f1d4b0dd519c7606aa2a Mon Sep 17 00:00:00 2001 From: Hariharan Basuthkar Date: Mon, 9 Dec 2019 15:15:18 +0530 Subject: [PATCH] qcacmn: Add regulatory 6G changes for Update 30 Update the regulatory database with the following changes: 1) Add full reg domain FCC15_FCCA, FCC16_FCCA and FCC17_FCCA. 2) Add associated 5G reg rules and channel bands for the new regdomains. Change-Id: I2b6038d0f106555adf650c12ca48efcaacc69071 CRs-Fixed: 2582502 --- umac/regulatory/core/src/reg_db.c | 64 ++++++++++++++++++- .../inc/reg_services_public_struct.h | 1 + 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/umac/regulatory/core/src/reg_db.c b/umac/regulatory/core/src/reg_db.c index e3cf2f7f984d..52fd2a1e059f 100644 --- a/umac/regulatory/core/src/reg_db.c +++ b/umac/regulatory/core/src/reg_db.c @@ -251,7 +251,11 @@ enum reg_domain { FCC11_WORLD = 0x19, FCC13_WORLD = 0xE4, FCC14_FCCB = 0xE6, - +#ifdef CONFIG_BAND_6GHZ + FCC15_FCCA = 0xEA, + FCC16_FCCA = 0xE8, + FCC17_FCCA = 0xE9, +#endif ETSI1_WORLD = 0x37, ETSI3_WORLD = 0x36, ETSI4_WORLD = 0x30, @@ -952,6 +956,11 @@ enum reg_domains_5g { FCC11, FCC13, FCC14, +#ifdef CONFIG_BAND_6GHZ + FCC15, + FCC16, + FCC17, +#endif ETSI1, ETSI3, ETSI4, @@ -1012,7 +1021,11 @@ const struct reg_domain_pair g_reg_dmn_pairs[] = { {FCC11_WORLD, FCC11, WORLD}, {FCC13_WORLD, FCC13, WORLD}, {FCC14_FCCB, FCC14, FCCB}, - +#ifdef CONFIG_BAND_6GHZ + {FCC15_FCCA, FCC15, FCCA}, + {FCC16_FCCA, FCC16, FCCA}, + {FCC17_FCCA, FCC17, FCCA}, +#endif {ETSI1_WORLD, ETSI1, WORLD}, {ETSI3_WORLD, ETSI3, WORLD}, {ETSI4_WORLD, ETSI4, WORLD}, @@ -1204,6 +1217,16 @@ enum reg_rules_5g { CHAN_5855_5875_1, CHAN_5850_5925_1, CHAN_5850_5925_2, +#ifdef CONFIG_BAND_6GHZ + CHAN_5935_6435_1, + CHAN_5935_6435_2, + CHAN_6435_6535_1, + CHAN_6435_6535_2, + CHAN_6535_6875_1, + CHAN_6535_6875_2, + CHAN_6875_7115_1, + CHAN_6875_7115_2, +#endif }; const struct regulatory_rule reg_rules_5g[] = { @@ -1286,6 +1309,16 @@ const struct regulatory_rule reg_rules_5g[] = { [CHAN_5855_5875_1] = {5855, 5875, 20, 30, 0}, [CHAN_5850_5925_1] = {5850, 5925, 20, 24, 0}, [CHAN_5850_5925_2] = {5850, 5925, 20, 30, 0}, +#ifdef CONFIG_BAND_6GHZ + [CHAN_5935_6435_1] = {5935, 6435, 160, 18, REGULATORY_CHAN_AFC}, + [CHAN_5935_6435_2] = {5935, 6435, 160, 30, REGULATORY_CHAN_AFC}, + [CHAN_6435_6535_1] = {6435, 6535, 160, 18, REGULATORY_CHAN_INDOOR_ONLY}, + [CHAN_6435_6535_2] = {6435, 6535, 160, 24, REGULATORY_CHAN_INDOOR_ONLY}, + [CHAN_6535_6875_1] = {6535, 6875, 160, 18, REGULATORY_CHAN_AFC}, + [CHAN_6535_6875_2] = {6535, 6875, 160, 30, REGULATORY_CHAN_AFC}, + [CHAN_6875_7115_1] = {6875, 7115, 160, 18, REGULATORY_CHAN_INDOOR_ONLY}, + [CHAN_6875_7115_2] = {6875, 7115, 160, 24, REGULATORY_CHAN_INDOOR_ONLY}, +#endif }; @@ -1341,6 +1374,33 @@ const struct regdomain regdomains_5g[] = { CHAN_5490_5730_4, CHAN_5735_5835_2} }, +#ifdef CONFIG_BAND_6GHZ + [FCC15] = {CTL_FCC, DFS_FCC_REGION, 2, 0, 8, {CHAN_5170_5250_5, + CHAN_5250_5330_7, + CHAN_5490_5730_1, + CHAN_5735_5835_2, + CHAN_5935_6435_1, + CHAN_6435_6535_1, + CHAN_6535_6875_1, + CHAN_6875_7115_1} }, + + [FCC16] = {CTL_FCC, DFS_FCC_REGION, 2, 0, 8, {CHAN_5170_5250_4, + CHAN_5250_5330_7, + CHAN_5490_5730_1, + CHAN_5735_5835_2, + CHAN_5935_6435_2, + CHAN_6435_6535_2, + CHAN_6535_6875_2, + CHAN_6875_7115_2} }, + + [FCC17] = {CTL_FCC, DFS_FCC_REGION, 2, 0, 6, {CHAN_5170_5250_4, + CHAN_5250_5330_7, + CHAN_5490_5730_1, + CHAN_5735_5835_2, + CHAN_5935_6435_2, + CHAN_6535_6875_2} }, +#endif + [ETSI1] = {CTL_ETSI, DFS_ETSI_REGION, 2, 0, 3, {CHAN_5170_5250_8, CHAN_5250_5330_12, CHAN_5490_5710_1} }, diff --git a/umac/regulatory/dispatcher/inc/reg_services_public_struct.h b/umac/regulatory/dispatcher/inc/reg_services_public_struct.h index d4db425a8cdd..a5732f5aed67 100644 --- a/umac/regulatory/dispatcher/inc/reg_services_public_struct.h +++ b/umac/regulatory/dispatcher/inc/reg_services_public_struct.h @@ -46,6 +46,7 @@ #define REGULATORY_CHAN_RADAR BIT(3) #define REGULATORY_CHAN_NO_OFDM BIT(6) #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) +#define REGULATORY_CHAN_AFC BIT(13) #define REGULATORY_CHAN_NO_HT40 BIT(4) #define REGULATORY_CHAN_NO_80MHZ BIT(7)