From 298863d0fefa9ac222cff7da00094eda3eec4fa0 Mon Sep 17 00:00:00 2001 From: Mrinmay Sarkar Date: Tue, 23 Mar 2021 10:58:21 +0530 Subject: [PATCH] Revert "msm: pci: Update VREG info fron DT" This reverts commit facf1631a4ae43240db4b0c40c10f22d79cfd733. The logic for parsing cofiguration for vregs for PCIe is already present in msm_pcie_get_resources. Hence this change is not required. Change-Id: I2b60b75573dc98b1d5cd45a630f0234e4eeae4e4 Signed-off-by: Mrinmay Sarkar --- drivers/pci/controller/pci-msm.c | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/drivers/pci/controller/pci-msm.c b/drivers/pci/controller/pci-msm.c index 7be12a223301..d1f65c5a12a8 100644 --- a/drivers/pci/controller/pci-msm.c +++ b/drivers/pci/controller/pci-msm.c @@ -191,7 +191,6 @@ #define MAX_PROP_SIZE (32) #define MAX_RC_NAME_LEN (15) #define MSM_PCIE_MAX_VREG (5) -#define MSM_PCIE_VREG_0P9 (2) #define MSM_PCIE_MAX_CLK (21) #define MSM_PCIE_MAX_PIPE_CLK (1) #define MAX_RC_NUM (5) @@ -842,7 +841,6 @@ struct msm_pcie_dev_t { struct msm_pcie_drv_info *drv_info; struct work_struct drv_enable_pc_work; struct work_struct drv_disable_pc_work; - int vreg_levels[3]; /* cache drv pc req from RC client, by default drv pc is enabled */ int drv_disable_pc_vote; @@ -6147,22 +6145,6 @@ static int msm_pcie_probe(struct platform_device *pdev) memcpy(pcie_dev->pipe_reset, msm_pcie_pipe_reset_info[rc_idx], sizeof(msm_pcie_pipe_reset_info[rc_idx])); - ret = of_property_read_u32_array(of_node, - "qcom,vreg-0.9-voltage-level", - (u32 *) pcie_dev->vreg_levels, - ARRAY_SIZE(pcie_dev->vreg_levels)); - if (ret) { - PCIE_DBG(pcie_dev, - "vreg-0.9-voltage-level missing, using default values\n"); - } else { - pcie_dev->vreg[MSM_PCIE_VREG_0P9].max_v = - pcie_dev->vreg_levels[0]; - pcie_dev->vreg[MSM_PCIE_VREG_0P9].min_v = - pcie_dev->vreg_levels[1]; - pcie_dev->vreg[MSM_PCIE_VREG_0P9].opt_mode = - pcie_dev->vreg_levels[2]; - } - for (i = 0; i < PCIE_CONF_SPACE_DW; i++) pcie_dev->rc_shadow[i] = PCIE_CLEAR; for (i = 0; i < MAX_DEVICE_NUM; i++)