From 15d5e755c0dc9007b8a3743cef8f0d8c523f537e Mon Sep 17 00:00:00 2001 From: Hemant Kumar Date: Wed, 7 Nov 2018 21:13:41 -0800 Subject: [PATCH] usb: dwc3: Increase the inter packet gap for USB 2.0 Default 0 value for IP_GAP_ADD_ON field of DWC3_GUCTL1 register is causing failure of EL_23 test. This value corresponds to inter-packet gap of 182.163 ns. Increase the value to 1 which corresponds to 199.794 ns. This improves margin required to pass the test. Change-Id: Iabc71a746ac90251eaec25597d8506df416796a5 Signed-off-by: Hemant Kumar Signed-off-by: Jack Pham --- drivers/usb/dwc3/core.c | 7 +++++++ drivers/usb/dwc3/core.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 999ce5e84d3c..734532abde8c 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1049,6 +1049,13 @@ static int dwc3_core_init(struct dwc3 *dwc) } } + /* set inter-packet gap 199.794ns to improve EL_23 margin */ + if (dwc->revision >= DWC3_USB31_REVISION_170A) { + reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); + reg |= DWC3_GUCTL1_IP_GAP_ADD_ON(1); + dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); + } + return 0; err4: diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 1c8b349379af..43053b3922d0 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -251,6 +251,7 @@ /* Global User Control 1 Register */ #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24) +#define DWC3_GUCTL1_IP_GAP_ADD_ON(n) (n << 21) /* Global Status Register */ #define DWC3_GSTS_OTG_IP BIT(10)