clk: qcom: gdsc-regulator: Poll PWR_ON during GDSC HW to SW mode switch

While switching from HW to SW control mode, HW may be busy updating
internal required signals. Add a check that polls for PWR_ON status
bit to ensure that the GDSC switches to SW mode before software starts
to use SW mode.

Change-Id: Ie6bd5c5e8c073fb70c696eeb6e911219108f9260
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
This commit is contained in:
Vivek Aknurwar 2020-05-07 01:17:42 -07:00
commit c503ce604a

View file

@ -499,6 +499,20 @@ static int gdsc_set_mode(struct regulator_dev *rdev, unsigned int mode)
*/
gdsc_mb(sc);
udelay(1);
/*
* While switching from HW to SW mode, HW may be busy
* updating internal required signals. Polling for PWR_ON
* ensures that the GDSC switches to SW mode before software
* starts to use SW mode.
*/
if (sc->is_gdsc_enabled) {
ret = poll_gdsc_status(sc, ENABLED);
if (ret) {
dev_err(&rdev->dev, "%s enable timed out\n",
sc->rdesc.name);
goto done;
}
}
sc->is_gdsc_hw_ctrl_mode = false;
break;
default: