From c52c8f7af4f4640bb0a26f4412f0fde9e65ae370 Mon Sep 17 00:00:00 2001 From: Zhen Kong Date: Thu, 29 Aug 2019 11:35:52 -0700 Subject: [PATCH] qseecom: add uapi headfile for Lahaina bring up Add qseecom.h, qcedev.h, fips_status.h for Lahaina bring up Change-Id: I21c1747e7ce9fab1d190b8ea54ac2d54c11bd44f Signed-off-by: Zhen Kong --- include/uapi/linux/fips_status.h | 38 +++ include/uapi/linux/qcedev.h | 289 +++++++++++++++++++++ include/uapi/linux/qseecom.h | 413 +++++++++++++++++++++++++++++++ 3 files changed, 740 insertions(+) create mode 100644 include/uapi/linux/fips_status.h create mode 100644 include/uapi/linux/qcedev.h create mode 100644 include/uapi/linux/qseecom.h diff --git a/include/uapi/linux/fips_status.h b/include/uapi/linux/fips_status.h new file mode 100644 index 000000000000..559a229d6bd0 --- /dev/null +++ b/include/uapi/linux/fips_status.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#ifndef _FIPS_STATUS__H +#define _FIPS_STATUS__H + +#include +#include + +/** + * fips_status: global FIPS140-2 status + * @FIPS140_STATUS_NA: + * Not a FIPS140-2 compliant Build. + * The flag status won't + * change throughout + * the lifetime + * @FIPS140_STATUS_PASS_CRYPTO: + * KAT self tests are passed. + * @FIPS140_STATUS_QCRYPTO_ALLOWED: + * Integrity test is passed. + * @FIPS140_STATUS_PASS: + * All tests are passed and build + * is in FIPS140-2 mode + * @FIPS140_STATUS_FAIL: + * One of the test is failed. + * This will block all requests + * to crypto modules + */ +enum fips_status { + FIPS140_STATUS_NA = 0, + FIPS140_STATUS_PASS_CRYPTO = 1, + FIPS140_STATUS_QCRYPTO_ALLOWED = 2, + FIPS140_STATUS_PASS = 3, + FIPS140_STATUS_FAIL = 0xFF +}; +#endif /* _FIPS_STATUS__H */ diff --git a/include/uapi/linux/qcedev.h b/include/uapi/linux/qcedev.h new file mode 100644 index 000000000000..0c5a7299af1d --- /dev/null +++ b/include/uapi/linux/qcedev.h @@ -0,0 +1,289 @@ +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#ifndef _QCEDEV__H +#define _QCEDEV__H + +#include +#include +#include "fips_status.h" + +#define QCEDEV_MAX_SHA_BLOCK_SIZE 64 +#define QCEDEV_MAX_BEARER 31 +#define QCEDEV_MAX_KEY_SIZE 64 +#define QCEDEV_MAX_IV_SIZE 32 + +#define QCEDEV_MAX_BUFFERS 16 +#define QCEDEV_MAX_SHA_DIGEST 32 + +#define QCEDEV_USE_PMEM 1 +#define QCEDEV_NO_PMEM 0 + +#define QCEDEV_AES_KEY_128 16 +#define QCEDEV_AES_KEY_192 24 +#define QCEDEV_AES_KEY_256 32 +/** + *qcedev_oper_enum: Operation types + * @QCEDEV_OPER_ENC: Encrypt + * @QCEDEV_OPER_DEC: Decrypt + * @QCEDEV_OPER_ENC_NO_KEY: Encrypt. Do not need key to be specified by + * user. Key already set by an external processor. + * @QCEDEV_OPER_DEC_NO_KEY: Decrypt. Do not need the key to be specified by + * user. Key already set by an external processor. + */ +enum qcedev_oper_enum { + QCEDEV_OPER_DEC = 0, + QCEDEV_OPER_ENC = 1, + QCEDEV_OPER_DEC_NO_KEY = 2, + QCEDEV_OPER_ENC_NO_KEY = 3, + QCEDEV_OPER_LAST +}; + +/** + *qcedev_oper_enum: Cipher algorithm types + * @QCEDEV_ALG_DES: DES + * @QCEDEV_ALG_3DES: 3DES + * @QCEDEV_ALG_AES: AES + */ +enum qcedev_cipher_alg_enum { + QCEDEV_ALG_DES = 0, + QCEDEV_ALG_3DES = 1, + QCEDEV_ALG_AES = 2, + QCEDEV_ALG_LAST +}; + +/** + *qcedev_cipher_mode_enum : AES mode + * @QCEDEV_AES_MODE_CBC: CBC + * @QCEDEV_AES_MODE_ECB: ECB + * @QCEDEV_AES_MODE_CTR: CTR + * @QCEDEV_AES_MODE_XTS: XTS + * @QCEDEV_AES_MODE_CCM: CCM + * @QCEDEV_DES_MODE_CBC: CBC + * @QCEDEV_DES_MODE_ECB: ECB + */ +enum qcedev_cipher_mode_enum { + QCEDEV_AES_MODE_CBC = 0, + QCEDEV_AES_MODE_ECB = 1, + QCEDEV_AES_MODE_CTR = 2, + QCEDEV_AES_MODE_XTS = 3, + QCEDEV_AES_MODE_CCM = 4, + QCEDEV_DES_MODE_CBC = 5, + QCEDEV_DES_MODE_ECB = 6, + QCEDEV_AES_DES_MODE_LAST +}; + +/** + *enum qcedev_sha_alg_enum : Secure Hashing Algorithm + * @QCEDEV_ALG_SHA1: Digest returned: 20 bytes (160 bits) + * @QCEDEV_ALG_SHA256: Digest returned: 32 bytes (256 bit) + * @QCEDEV_ALG_SHA1_HMAC: HMAC returned 20 bytes (160 bits) + * @QCEDEV_ALG_SHA256_HMAC: HMAC returned 32 bytes (256 bit) + * @QCEDEV_ALG_AES_CMAC: Configurable MAC size + */ +enum qcedev_sha_alg_enum { + QCEDEV_ALG_SHA1 = 0, + QCEDEV_ALG_SHA256 = 1, + QCEDEV_ALG_SHA1_HMAC = 2, + QCEDEV_ALG_SHA256_HMAC = 3, + QCEDEV_ALG_AES_CMAC = 4, + QCEDEV_ALG_SHA_ALG_LAST +}; + +/** + * struct buf_info - Buffer information + * @offset: Offset from the base address of the buffer + * (Used when buffer is allocated using PMEM) + * @vaddr: Virtual buffer address pointer + * @len: Size of the buffer + */ +struct buf_info { + union { + uint32_t offset; + uint8_t *vaddr; + }; + uint32_t len; +}; + +/** + * struct qcedev_vbuf_info - Source and destination Buffer information + * @src: Array of buf_info for input/source + * @dst: Array of buf_info for output/destination + */ +struct qcedev_vbuf_info { + struct buf_info src[QCEDEV_MAX_BUFFERS]; + struct buf_info dst[QCEDEV_MAX_BUFFERS]; +}; + +/** + * struct qcedev_pmem_info - Stores PMEM buffer information + * @fd_src: Handle to /dev/adsp_pmem used to allocate + * memory for input/src buffer + * @src: Array of buf_info for input/source + * @fd_dst: Handle to /dev/adsp_pmem used to allocate + * memory for output/dst buffer + * @dst: Array of buf_info for output/destination + * @pmem_src_offset: The offset from input/src buffer + * (allocated by PMEM) + */ +struct qcedev_pmem_info { + int fd_src; + struct buf_info src[QCEDEV_MAX_BUFFERS]; + int fd_dst; + struct buf_info dst[QCEDEV_MAX_BUFFERS]; +}; + +/** + * struct qcedev_cipher_op_req - Holds the ciphering request information + * @use_pmem (IN): Flag to indicate if buffer source is PMEM + * QCEDEV_USE_PMEM/QCEDEV_NO_PMEM + * @pmem (IN): Stores PMEM buffer information. + * Refer struct qcedev_pmem_info + * @vbuf (IN/OUT): Stores Source and destination Buffer information + * Refer to struct qcedev_vbuf_info + * @data_len (IN): Total Length of input/src and output/dst in bytes + * @in_place_op (IN): Indicates whether the operation is inplace where + * source == destination + * When using PMEM allocated memory, must set this to 1 + * @enckey (IN): 128 bits of confidentiality key + * enckey[0] bit 127-120, enckey[1] bit 119-112,.. + * enckey[15] bit 7-0 + * @encklen (IN): Length of the encryption key(set to 128 bits/16 + * bytes in the driver) + * @iv (IN/OUT): Initialisation vector data + * This is updated by the driver, incremented by + * number of blocks encrypted/decrypted. + * @ivlen (IN): Length of the IV + * @byteoffset (IN): Offset in the Cipher BLOCK (applicable and to be set + * for AES-128 CTR mode only) + * @alg (IN): Type of ciphering algorithm: AES/DES/3DES + * @mode (IN): Mode use when using AES algorithm: ECB/CBC/CTR + * Apllicabel when using AES algorithm only + * @op (IN): Type of operation: QCEDEV_OPER_DEC/QCEDEV_OPER_ENC or + * QCEDEV_OPER_ENC_NO_KEY/QCEDEV_OPER_DEC_NO_KEY + * + *If use_pmem is set to 0, the driver assumes that memory was not allocated + * via PMEM, and kernel will need to allocate memory and copy data from user + * space buffer (data_src/dta_dst) and process accordingly and copy data back + * to the user space buffer + * + * If use_pmem is set to 1, the driver assumes that memory was allocated via + * PMEM. + * The kernel driver will use the fd_src to determine the kernel virtual address + * base that maps to the user space virtual address base for the buffer + * allocated in user space. + * The final input/src and output/dst buffer pointer will be determined + * by adding the offsets to the kernel virtual addr. + * + * If use of hardware key is supported in the target, user can configure the + * key parameters (encklen, enckey) to use the hardware key. + * In order to use the hardware key, set encklen to 0 and set the enckey + * data array to 0. + */ +struct qcedev_cipher_op_req { + uint8_t use_pmem; + union { + struct qcedev_pmem_info pmem; + struct qcedev_vbuf_info vbuf; + }; + uint32_t entries; + uint32_t data_len; + uint8_t in_place_op; + uint8_t enckey[QCEDEV_MAX_KEY_SIZE]; + uint32_t encklen; + uint8_t iv[QCEDEV_MAX_IV_SIZE]; + uint32_t ivlen; + uint32_t byteoffset; + enum qcedev_cipher_alg_enum alg; + enum qcedev_cipher_mode_enum mode; + enum qcedev_oper_enum op; +}; + +/** + * struct qcedev_sha_op_req - Holds the hashing request information + * @data (IN): Array of pointers to the data to be hashed + * @entries (IN): Number of buf_info entries in the data array + * @data_len (IN): Length of data to be hashed + * @digest (IN/OUT): Returns the hashed data information + * @diglen (OUT): Size of the hashed/digest data + * @authkey (IN): Pointer to authentication key for HMAC + * @authklen (IN): Size of the authentication key + * @alg (IN): Secure Hash algorithm + */ +struct qcedev_sha_op_req { + struct buf_info data[QCEDEV_MAX_BUFFERS]; + uint32_t entries; + uint32_t data_len; + uint8_t digest[QCEDEV_MAX_SHA_DIGEST]; + uint32_t diglen; + uint8_t *authkey; + uint32_t authklen; + enum qcedev_sha_alg_enum alg; +}; + +/** + * struct qfips_verify_t - Holds data for FIPS Integrity test + * @kernel_size (IN): Size of kernel Image + * @kernel (IN): pointer to buffer containing the kernel Image + */ +struct qfips_verify_t { + unsigned int kernel_size; + void *kernel; +}; + +/** + * struct qcedev_map_buf_req - Holds the mapping request information + * fd (IN): Array of fds. + * num_fds (IN): Number of fds in fd[]. + * fd_size (IN): Array of sizes corresponding to each fd in fd[]. + * fd_offset (IN): Array of offset corresponding to each fd in fd[]. + * vaddr (OUT): Array of mapped virtual address corresponding to + * each fd in fd[]. + */ +struct qcedev_map_buf_req { + int32_t fd[QCEDEV_MAX_BUFFERS]; + uint32_t num_fds; + uint32_t fd_size[QCEDEV_MAX_BUFFERS]; + uint32_t fd_offset[QCEDEV_MAX_BUFFERS]; + uint64_t buf_vaddr[QCEDEV_MAX_BUFFERS]; +}; + +/** + * struct qcedev_unmap_buf_req - Holds the hashing request information + * fd (IN): Array of fds to unmap + * num_fds (IN): Number of fds in fd[]. + */ +struct qcedev_unmap_buf_req { + int32_t fd[QCEDEV_MAX_BUFFERS]; + uint32_t num_fds; +}; + +struct file; + +#define QCEDEV_IOC_MAGIC 0x87 + +#define QCEDEV_IOCTL_ENC_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 1, struct qcedev_cipher_op_req) +#define QCEDEV_IOCTL_DEC_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 2, struct qcedev_cipher_op_req) +#define QCEDEV_IOCTL_SHA_INIT_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 3, struct qcedev_sha_op_req) +#define QCEDEV_IOCTL_SHA_UPDATE_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 4, struct qcedev_sha_op_req) +#define QCEDEV_IOCTL_SHA_FINAL_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 5, struct qcedev_sha_op_req) +#define QCEDEV_IOCTL_GET_SHA_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 6, struct qcedev_sha_op_req) +#define QCEDEV_IOCTL_LOCK_CE \ + _IO(QCEDEV_IOC_MAGIC, 7) +#define QCEDEV_IOCTL_UNLOCK_CE \ + _IO(QCEDEV_IOC_MAGIC, 8) +#define QCEDEV_IOCTL_GET_CMAC_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 9, struct qcedev_sha_op_req) +#define QCEDEV_IOCTL_MAP_BUF_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 10, struct qcedev_map_buf_req) +#define QCEDEV_IOCTL_UNMAP_BUF_REQ \ + _IOWR(QCEDEV_IOC_MAGIC, 11, struct qcedev_unmap_buf_req) +#endif /* _QCEDEV__H */ diff --git a/include/uapi/linux/qseecom.h b/include/uapi/linux/qseecom.h new file mode 100644 index 000000000000..16b15141f381 --- /dev/null +++ b/include/uapi/linux/qseecom.h @@ -0,0 +1,413 @@ +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ +/* + * Copyright (c) 2017, 2019, The Linux Foundation. All rights reserved. + */ + +#ifndef _QSEECOM_H_ +#define _QSEECOM_H_ + +#include +#include + +#define MAX_ION_FD 4 +#define MAX_APP_NAME_SIZE 64 +#define QSEECOM_HASH_SIZE 32 + +/* qseecom_ta_heap allocation retry delay (ms) and max attemp count */ +#define QSEECOM_TA_ION_ALLOCATE_DELAY 50 +#define QSEECOM_TA_ION_ALLOCATE_MAX_ATTEMP 20 + +#define ICE_KEY_SIZE 32 +#define ICE_SALT_SIZE 32 + +/* + * struct qseecom_register_listener_req - + * for register listener ioctl request + * @listener_id - service id (shared between userspace and QSE) + * @ifd_data_fd - ion handle + * @virt_sb_base - shared buffer base in user space + * @sb_size - shared buffer size + */ +struct qseecom_register_listener_req { + uint32_t listener_id; /* in */ + int32_t ifd_data_fd; /* in */ + void *virt_sb_base; /* in */ + uint32_t sb_size; /* in */ +}; + +/* + * struct qseecom_send_cmd_req - for send command ioctl request + * @cmd_req_len - command buffer length + * @cmd_req_buf - command buffer + * @resp_len - response buffer length + * @resp_buf - response buffer + */ +struct qseecom_send_cmd_req { + void *cmd_req_buf; /* in */ + unsigned int cmd_req_len; /* in */ + void *resp_buf; /* in/out */ + unsigned int resp_len; /* in/out */ +}; + +/* + * struct qseecom_ion_fd_info - ion fd handle data information + * @fd - ion handle to some memory allocated in user space + * @cmd_buf_offset - command buffer offset + */ +struct qseecom_ion_fd_info { + int32_t fd; + uint32_t cmd_buf_offset; +}; +/* + * struct qseecom_send_modfd_cmd_req - for send command ioctl request + * @cmd_req_len - command buffer length + * @cmd_req_buf - command buffer + * @resp_len - response buffer length + * @resp_buf - response buffer + * @ifd_data_fd - ion handle to memory allocated in user space + * @cmd_buf_offset - command buffer offset + */ +struct qseecom_send_modfd_cmd_req { + void *cmd_req_buf; /* in */ + unsigned int cmd_req_len; /* in */ + void *resp_buf; /* in/out */ + unsigned int resp_len; /* in/out */ + struct qseecom_ion_fd_info ifd_data[MAX_ION_FD]; +}; + +/* + * struct qseecom_listener_send_resp_req - signal to continue the send_cmd req. + * Used as a trigger from HLOS service to notify QSEECOM that it's done with its + * operation and provide the response for QSEECOM can continue the incomplete + * command execution + * @resp_len - Length of the response + * @resp_buf - Response buffer where the response of the cmd should go. + */ +struct qseecom_send_resp_req { + void *resp_buf; /* in */ + unsigned int resp_len; /* in */ +}; + +/* + * struct qseecom_load_img_data - for sending image length information and + * ion file descriptor to the qseecom driver. ion file descriptor is used + * for retrieving the ion file handle and in turn the physical address of + * the image location. + * @mdt_len - Length of the .mdt file in bytes. + * @img_len - Length of the .mdt + .b00 +..+.bxx images files in bytes + * @ion_fd - Ion file descriptor used when allocating memory. + * @img_name - Name of the image. + * @app_arch - Architecture of the image, i.e. 32bit or 64bit app + */ +struct qseecom_load_img_req { + uint32_t mdt_len; /* in */ + uint32_t img_len; /* in */ + int32_t ifd_data_fd; /* in */ + char img_name[MAX_APP_NAME_SIZE]; /* in */ + uint32_t app_arch; /* in */ + uint32_t app_id; /* out*/ +}; + +struct qseecom_set_sb_mem_param_req { + int32_t ifd_data_fd; /* in */ + void *virt_sb_base; /* in */ + uint32_t sb_len; /* in */ +}; + +/* + * struct qseecom_qseos_version_req - get qseos version + * @qseos_version - version number + */ +struct qseecom_qseos_version_req { + unsigned int qseos_version; /* in */ +}; + +/* + * struct qseecom_qseos_app_load_query - verify if app is loaded in qsee + * @app_name[MAX_APP_NAME_SIZE]- name of the app. + * @app_id - app id. + */ +struct qseecom_qseos_app_load_query { + char app_name[MAX_APP_NAME_SIZE]; /* in */ + uint32_t app_id; /* out */ + uint32_t app_arch; +}; + +struct qseecom_send_svc_cmd_req { + uint32_t cmd_id; + void *cmd_req_buf; /* in */ + unsigned int cmd_req_len; /* in */ + void *resp_buf; /* in/out */ + unsigned int resp_len; /* in/out */ +}; + +enum qseecom_key_management_usage_type { + QSEOS_KM_USAGE_DISK_ENCRYPTION = 0x01, + QSEOS_KM_USAGE_FILE_ENCRYPTION = 0x02, + QSEOS_KM_USAGE_UFS_ICE_DISK_ENCRYPTION = 0x03, + QSEOS_KM_USAGE_SDCC_ICE_DISK_ENCRYPTION = 0x04, + QSEOS_KM_USAGE_MAX +}; + +struct qseecom_create_key_req { + unsigned char hash32[QSEECOM_HASH_SIZE]; + enum qseecom_key_management_usage_type usage; +}; + +struct qseecom_wipe_key_req { + enum qseecom_key_management_usage_type usage; + int wipe_key_flag;/* 1->remove key from storage(alone with clear key) */ + /* 0->do not remove from storage (clear key) */ +}; + +struct qseecom_update_key_userinfo_req { + unsigned char current_hash32[QSEECOM_HASH_SIZE]; + unsigned char new_hash32[QSEECOM_HASH_SIZE]; + enum qseecom_key_management_usage_type usage; +}; + +#define SHA256_DIGEST_LENGTH (256/8) +/* + * struct qseecom_save_partition_hash_req + * @partition_id - partition id. + * @hash[SHA256_DIGEST_LENGTH] - sha256 digest. + */ +struct qseecom_save_partition_hash_req { + int partition_id; /* in */ + char digest[SHA256_DIGEST_LENGTH]; /* in */ +}; + +/* + * struct qseecom_is_es_activated_req + * @is_activated - 1=true , 0=false + */ +struct qseecom_is_es_activated_req { + int is_activated; /* out */ +}; + +/* + * struct qseecom_mdtp_cipher_dip_req + * @in_buf - input buffer + * @in_buf_size - input buffer size + * @out_buf - output buffer + * @out_buf_size - output buffer size + * @direction - 0=encrypt, 1=decrypt + */ +struct qseecom_mdtp_cipher_dip_req { + uint8_t *in_buf; + uint32_t in_buf_size; + uint8_t *out_buf; + uint32_t out_buf_size; + uint32_t direction; +}; + +enum qseecom_bandwidth_request_mode { + INACTIVE = 0, + LOW, + MEDIUM, + HIGH, +}; + +/* + * struct qseecom_send_modfd_resp - for send command ioctl request + * @req_len - command buffer length + * @req_buf - command buffer + * @ifd_data_fd - ion handle to memory allocated in user space + * @cmd_buf_offset - command buffer offset + */ +struct qseecom_send_modfd_listener_resp { + void *resp_buf_ptr; /* in */ + unsigned int resp_len; /* in */ + struct qseecom_ion_fd_info ifd_data[MAX_ION_FD]; /* in */ +}; + +struct qseecom_qteec_req { + void *req_ptr; + uint32_t req_len; + void *resp_ptr; + uint32_t resp_len; +}; + +struct qseecom_qteec_modfd_req { + void *req_ptr; + uint32_t req_len; + void *resp_ptr; + uint32_t resp_len; + struct qseecom_ion_fd_info ifd_data[MAX_ION_FD]; +}; + +struct qseecom_sg_entry { + uint32_t phys_addr; + uint32_t len; +}; + +struct qseecom_sg_entry_64bit { + uint64_t phys_addr; + uint32_t len; +} __attribute__ ((packed)); + +/* + * sg list buf format version + * 1: Legacy format to support only 512 SG list entries + * 2: new format to support > 512 entries + */ +#define QSEECOM_SG_LIST_BUF_FORMAT_VERSION_1 1 +#define QSEECOM_SG_LIST_BUF_FORMAT_VERSION_2 2 + +struct qseecom_sg_list_buf_hdr_64bit { + struct qseecom_sg_entry_64bit blank_entry; /* must be all 0 */ + uint32_t version; /* sg list buf format version */ + uint64_t new_buf_phys_addr; /* PA of new buffer */ + uint32_t nents_total; /* Total number of SG entries */ +} __attribute__ ((packed)); + +#define QSEECOM_SG_LIST_BUF_HDR_SZ_64BIT \ + sizeof(struct qseecom_sg_list_buf_hdr_64bit) + +#define MAX_CE_PIPE_PAIR_PER_UNIT 3 +#define INVALID_CE_INFO_UNIT_NUM 0xffffffff + +#define CE_PIPE_PAIR_USE_TYPE_FDE 0 +#define CE_PIPE_PAIR_USE_TYPE_PFE 1 + +struct qseecom_ce_pipe_entry { + int valid; + unsigned int ce_num; + unsigned int ce_pipe_pair; +}; + +struct qseecom_ice_data_t { + int flag; +}; + +#define MAX_CE_INFO_HANDLE_SIZE 32 +struct qseecom_ce_info_req { + unsigned char handle[MAX_CE_INFO_HANDLE_SIZE]; + unsigned int usage; + unsigned int unit_num; + unsigned int num_ce_pipe_entries; + struct qseecom_ce_pipe_entry ce_pipe_entry[MAX_CE_PIPE_PAIR_PER_UNIT]; +}; + +struct qseecom_ice_key_data_t { + uint8_t key[ICE_KEY_SIZE]; + uint32_t key_len; + uint8_t salt[ICE_SALT_SIZE]; + uint32_t salt_len; +}; + +#define SG_ENTRY_SZ sizeof(struct qseecom_sg_entry) +#define SG_ENTRY_SZ_64BIT sizeof(struct qseecom_sg_entry_64bit) + +struct file; + + +#define QSEECOM_IOC_MAGIC 0x97 + + +#define QSEECOM_IOCTL_REGISTER_LISTENER_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 1, struct qseecom_register_listener_req) + +#define QSEECOM_IOCTL_UNREGISTER_LISTENER_REQ \ + _IO(QSEECOM_IOC_MAGIC, 2) + +#define QSEECOM_IOCTL_SEND_CMD_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 3, struct qseecom_send_cmd_req) + +#define QSEECOM_IOCTL_SEND_MODFD_CMD_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 4, struct qseecom_send_modfd_cmd_req) + +#define QSEECOM_IOCTL_RECEIVE_REQ \ + _IO(QSEECOM_IOC_MAGIC, 5) + +#define QSEECOM_IOCTL_SEND_RESP_REQ \ + _IO(QSEECOM_IOC_MAGIC, 6) + +#define QSEECOM_IOCTL_LOAD_APP_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 7, struct qseecom_load_img_req) + +#define QSEECOM_IOCTL_SET_MEM_PARAM_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 8, struct qseecom_set_sb_mem_param_req) + +#define QSEECOM_IOCTL_UNLOAD_APP_REQ \ + _IO(QSEECOM_IOC_MAGIC, 9) + +#define QSEECOM_IOCTL_GET_QSEOS_VERSION_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 10, struct qseecom_qseos_version_req) + +#define QSEECOM_IOCTL_PERF_ENABLE_REQ \ + _IO(QSEECOM_IOC_MAGIC, 11) + +#define QSEECOM_IOCTL_PERF_DISABLE_REQ \ + _IO(QSEECOM_IOC_MAGIC, 12) + +#define QSEECOM_IOCTL_LOAD_EXTERNAL_ELF_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 13, struct qseecom_load_img_req) + +#define QSEECOM_IOCTL_UNLOAD_EXTERNAL_ELF_REQ \ + _IO(QSEECOM_IOC_MAGIC, 14) + +#define QSEECOM_IOCTL_APP_LOADED_QUERY_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 15, struct qseecom_qseos_app_load_query) + +#define QSEECOM_IOCTL_SEND_CMD_SERVICE_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 16, struct qseecom_send_svc_cmd_req) + +#define QSEECOM_IOCTL_CREATE_KEY_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 17, struct qseecom_create_key_req) + +#define QSEECOM_IOCTL_WIPE_KEY_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 18, struct qseecom_wipe_key_req) + +#define QSEECOM_IOCTL_SAVE_PARTITION_HASH_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 19, struct qseecom_save_partition_hash_req) + +#define QSEECOM_IOCTL_IS_ES_ACTIVATED_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 20, struct qseecom_is_es_activated_req) + +#define QSEECOM_IOCTL_SEND_MODFD_RESP \ + _IOWR(QSEECOM_IOC_MAGIC, 21, struct qseecom_send_modfd_listener_resp) + +#define QSEECOM_IOCTL_SET_BUS_SCALING_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 23, int) + +#define QSEECOM_IOCTL_UPDATE_KEY_USER_INFO_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 24, struct qseecom_update_key_userinfo_req) + +#define QSEECOM_QTEEC_IOCTL_OPEN_SESSION_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 30, struct qseecom_qteec_modfd_req) + +#define QSEECOM_QTEEC_IOCTL_CLOSE_SESSION_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 31, struct qseecom_qteec_req) + +#define QSEECOM_QTEEC_IOCTL_INVOKE_MODFD_CMD_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 32, struct qseecom_qteec_modfd_req) + +#define QSEECOM_QTEEC_IOCTL_REQUEST_CANCELLATION_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 33, struct qseecom_qteec_modfd_req) + +#define QSEECOM_IOCTL_MDTP_CIPHER_DIP_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 34, struct qseecom_mdtp_cipher_dip_req) + +#define QSEECOM_IOCTL_SEND_MODFD_CMD_64_REQ \ + _IOWR(QSEECOM_IOC_MAGIC, 35, struct qseecom_send_modfd_cmd_req) + +#define QSEECOM_IOCTL_SEND_MODFD_RESP_64 \ + _IOWR(QSEECOM_IOC_MAGIC, 36, struct qseecom_send_modfd_listener_resp) + +#define QSEECOM_IOCTL_GET_CE_PIPE_INFO \ + _IOWR(QSEECOM_IOC_MAGIC, 40, struct qseecom_ce_info_req) + +#define QSEECOM_IOCTL_FREE_CE_PIPE_INFO \ + _IOWR(QSEECOM_IOC_MAGIC, 41, struct qseecom_ce_info_req) + +#define QSEECOM_IOCTL_QUERY_CE_PIPE_INFO \ + _IOWR(QSEECOM_IOC_MAGIC, 42, struct qseecom_ce_info_req) + +#define QSEECOM_IOCTL_SET_ICE_INFO \ + _IOWR(QSEECOM_IOC_MAGIC, 43, struct qseecom_ice_data_t) + +#define QSEECOM_IOCTL_FBE_CLEAR_KEY \ + _IOWR(QSEECOM_IOC_MAGIC, 44, struct qseecom_ice_key_data_t) + +#endif /* _QSEECOM_H_ */