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drm/amdgpu: exposing fica registers to df offsets

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exposing fica registers to poll df pie data for xgmi error counters for
vega20.

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Alexander Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jonathan Kim 2019-07-11 12:19:44 -04:00 • committed by Alex Deucher
commit c52e7ebce7
1 changed files with 4 additions and 0 deletions
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4
drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_offset.h
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@ -48,4 +48,8 @@
#define smnPerfMonCtrLo3 0x01d478UL
#define smnPerfMonCtrHi3 0x01d47cUL
#define smnDF_PIE_AON_FabricIndirectConfigAccessAddress3 0x1d05cUL
#define smnDF_PIE_AON_FabricIndirectConfigAccessDataLo3 0x1d098UL
#define smnDF_PIE_AON_FabricIndirectConfigAccessDataHi3 0x1d09cUL
#endif