From c594bd2fdfa33b5553948ddff31c5e3535a38e8b Mon Sep 17 00:00:00 2001
From: Jyothi Kumar Seerapu <jseerapu@qti.qualcomm.com>
Date: Fri, 14 Oct 2022 19:16:12 +0530
Subject: [PATCH] ARM: dts: qcom: Set PCIe Wr halt to 1GB and disable BDF halt
 for sdxlemur

This change will set the PCIe Wr halt window size to 1GB and
disables BDF halt for sdxlemur for HSP CPE attach.

In sdxlemur for HSP CPE attaches observed throughput degradation due to
PCIe latencies with default PCIe write halt window of 1MB and BDF halt
feature enable.
So, increased PCIe Wr halt window size to 1GB and disabled
BDF halt for sdxlemur.

Change-Id: Ibfcccd54e91fa18702bce8b81402acce34bfdc5e
---
 qcom/sdxlemur-mtp-cpe-hsp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qcom/sdxlemur-mtp-cpe-hsp.dtsi b/qcom/sdxlemur-mtp-cpe-hsp.dtsi
index e8ba2208d897..477a478c99db 100644
--- a/qcom/sdxlemur-mtp-cpe-hsp.dtsi
+++ b/qcom/sdxlemur-mtp-cpe-hsp.dtsi
@@ -2,6 +2,8 @@
 
 &pcie0 {
 	qcom,boot-option = <0x1>;
+	qcom,bdf-halt-dis;
+	qcom,wr-halt-size = <0x1e>;
 };
 
 &pcie0_bus2_dev2_fn0 {