From c5ee8953372c911a29ddf6e7e9547f2572d5bbe5 Mon Sep 17 00:00:00 2001 From: Jack Pham Date: Tue, 28 Jan 2020 19:22:18 -0800 Subject: [PATCH] ARM: dts: msm: Add pin configuration for USB3 PHY portselect TLMM pin 81 is used to indicate to the USB3/DP Combo PHY the orientation that which the PMIC detected a USB-C connection. Select this pinctrl from the usb_qmp_dp_phy device and ensure it is selecting the "usb_phy" pin function. Change-Id: I2429bcaf28dfb8a570feab31955b595adfd0b215 --- qcom/lahaina-pinctrl.dtsi | 13 +++++++++++++ qcom/lahaina-usb.dtsi | 4 ++++ 2 files changed, 17 insertions(+) diff --git a/qcom/lahaina-pinctrl.dtsi b/qcom/lahaina-pinctrl.dtsi index 68e461f8d38f..1574b78490e6 100644 --- a/qcom/lahaina-pinctrl.dtsi +++ b/qcom/lahaina-pinctrl.dtsi @@ -2926,6 +2926,19 @@ }; }; }; + + usb3phy_portselect_default: usb3phy_portselect_default { + mux { + pins = "gpio81"; + function = "usb_phy"; + }; + + config { + pins = "gpio81"; + bias-disable; + drive-strength = <2>; + }; + }; }; pmx_sde: pmx_sde { diff --git a/qcom/lahaina-usb.dtsi b/qcom/lahaina-usb.dtsi index 03b6434fe8d8..b50b21854538 100644 --- a/qcom/lahaina-usb.dtsi +++ b/qcom/lahaina-usb.dtsi @@ -145,6 +145,10 @@ resets = <&clock_gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&clock_gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "global_phy_reset", "phy_reset"; + + pinctrl-names = "default"; + pinctrl-0 = <&usb3phy_portselect_default>; + qcom,qmp-phy-reg-offset =