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mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming ecc-scheme, like: - OMAP_ECC_HAMMING_CODE_DEFAULT 1-bit hamming ecc code using software library - OMAP_ECC_HAMMING_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine - OMAP_ECC_HAMMING_CODE_HW_ROMCODE 1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible to ROM code. This patch combines above multiple ecc-schemes into single implementation: - OMAP_ECC_HAM1_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible ecc-layout. Signed-off-by: Pekon Gupta <[email protected]> Reviewed-by: Felipe Balbi <[email protected]> Acked-by: Tony Lindgren <[email protected]> Tested-by: Ezequiel Garcia <[email protected]> Signed-off-by: Brian Norris <[email protected]>
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parent
ac65caf514
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c66d039197
4 changed files with 9 additions and 17 deletions
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@ -1993,10 +1993,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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}
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/* select the ecc type */
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if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
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info->nand.ecc.mode = NAND_ECC_SOFT;
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else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
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(pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)) {
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if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
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info->nand.ecc.bytes = 3;
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info->nand.ecc.size = 512;
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info->nand.ecc.strength = 1;
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@ -2025,7 +2022,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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}
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/* rom code layout */
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if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE) {
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if (pdata->ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
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if (info->nand.options & NAND_BUSWIDTH_16)
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offset = 2;
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@ -2033,7 +2030,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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offset = 1;
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info->nand.badblock_pattern = &bb_descrip_flashbased;
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}
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omap_oobinfo.eccbytes = 3 * (info->mtd.oobsize/16);
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omap_oobinfo.eccbytes = 3 * (info->mtd.writesize / 512);
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for (i = 0; i < omap_oobinfo.eccbytes; i++)
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omap_oobinfo.eccpos[i] = i+offset;
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